Author(s): Krishna Kishore Anumanchi, K. V. Ramana Reddy, Dr. Siva Yellampalli
Published in: International Journal of Engineering Research & Technology
License: This work is licensed under a Creative Commons Attribution 4.0 International License.
Volume/Issue: Volume. 4 - Issue. 05 , May - 2015
In this paper we introduce a faster system level prototyping approach for IP using Xilinx EDK flow approach. In addition to design under test this method uses set of pre-verified standard designs to validate IP of our interest. Proposed method utilizes Xilinx EDK to build system with microblaze processor on FPGA, and SDK to develop application on microblaze that controls the stimulus to IP.
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