An Area Efficient MC-CDMA Multiuser Detection with VLSI Implementation Strategy

An Area Efficient MC-CDMA Multiuser Detection with VLSI Implementation Strategy

Vasudevan N PG Scholar

Kalaignar Karunanidhi Institute of Technology coimbatore, india

Kathiravan S Assistant Professor

Kalaignar Karunanidhi Institute of Technology Coimbatore, India

Abstract- This paper describes an optimal design of Multi Carrier Code Division Multiple Access (MC-CDMA) based transceiver in terms of complexity and number of computations for different fading environments. The performance gap between OFDM, CDMA and proposed roptimal MC-CDMA transceiver is evaluated with FPGA implementation. Finally we proved that the proposed transceiver will give throughput rate of more than 1Gbps in order to propose it for 4G network.The proposed algorithm was assessed dually in terms of simulations in MATLAB and implementation on FPGA with real time data.

Keywords- Code Division Multiple Access (CDMA), Orthogonal Frequency Division Multiplexing (OFDM) linear feedback shift register (LFSR),

1. INTRODUCTION

   MC CDMA is one of the digital modulation schemes that combine the advantages of Orthogonal Frequency Division Multiplexing (OFDM) and Code Division Multiple Access (CDMA). MC-CDMA combines together the features of both CDMA and OFDM to provide

   strength against frequency selective fading [1]. MC-CDMA addresses the issues of spreading the signal bandwidth without increasing the adverse effects of delay spread, which is a measure of length of impulse response of channel [2, 3].

   OFDM came into picture when higher data rates were to be achieved in mobile communications but this desire led to Inter symbol Interference (ISI). Actually in order to achieve higher data rates in mobile communications the symbol duration needs to be shortened. When the duration of symbol is reduced, the probability of loss of information increases due to ISI and other channel impairments. As MCCDMA channel is composed of N narrow band subcarrier signals each of which has symbol duration much larger than the delay spread [4], MC CDMA signal will not experience significant degradation from inter- chip interference (ICI) and inter symbol interference (ISI).

   Multiple carriers are used to combat ISI. This task can be accomplished by the conversion of very high data streams into several low data rate streams. After which, these multiple low data rate streams are transmitted on multiple subcarriers which are suitably placed by

   separation at integer multiples of symbol frequency among them. This phenomenon makes them orthogonal and this feature permits the transmission of several subcarriers in tight frequency space without interference with each other. This makes an efficient utilization of spectrum and resistance to frequency selective fading and thus known as Multi-Carrier Modulation.

2. Pseudo-Random Number Generator

   Pseudo random number generator (PRNG) prevents invaders to find message bits easily. A secret key can be used as a seed for PRNGs. Using a seed causes PRNGs to generate the same random numbers on receiver side as on the sender side. In this paper, a linear feedback shift register (LFSR) is used as PRNG.

   1. Implementation of modulo-2 adder

      A LFSR is made of sequential shift-register with combinational feedback logic connected to it which can generate a sequence of binary values in a pseudo-random manner. A design modeled around LFSRs often has both speed and area advantages over a functionally equivalent design that does not use LFSRs.

      Feedbacks around an LFSRs shift register are connected to the certain points (taps) of LFSR construction and constitute either XORing or XNORing these taps to provide taps back into the register.

      The selection of taps determines how many values can be generated in a given sequence before the sequence is repeated. Certain tap arrangement lead to maximal length sequences of (2n – 1).

3. DESIGN OF TRANSCEIVER

   Since the MC-CDMA takes the advantages of both CDMA and OFDM and makes an efficient transmission system for high data rate communication. Handicap in design phase of modem employing MC-CDMA advantages is computational complexity its implementation for high data rate communications for analyzing its performance in small and large scale fading channels.

   The system model for the proposed design is as follows: Information data (binary, image, audio and video) acquired from multiple users is transformed into Binary Phase Shift Keying (BPSK) matrix as this passband modulation provides significant simplicity in the system. The next step involves generation of the Variable length Walsh matrix according to the specifications of user. Flexibility in terms of size of Walsh matrix should be used to appropriately adjust the length of code, and thus number of computations, according to the condition of channel and number of orthogonal subcarriers which are to be multiplied with either Walsh Hadamardcodes or Convolutional Codes for frequency diversity. The purpose is to provide immunity against large scale fading which causes changing of the mean path loss over distances that exists within the range of the size of obstructions [6].A method to reduce multiple access interference (MAI) in multiple access schemes is to use convolutional code. The generation of orthogonal frequencies could be used to optimize the transmitter characteristics. Instead of creating subcarriers in an ascending manner with a very high value at the last, the process can be optimized by selecting a central mid-range frequency and placing the rest around it in a descending manner. The process of

   subcarrier generation done through FFT is optimized through level reuse and thus the most important concept in the presented framework. Parameters in architecture of FFT are controlled to balance the tradeoff between complexity and frequency diversity through orthogonality. The composite signal is transmitted through a fast fading channel. When the signal passes through this channel, noise and different impairments are added to the signal.

   At the receiver side, the information is retrieved from the received composite signal by its multiplication with the corresponding users code (WALSH Code or Convolutional Code). Then multiplication with orthogonal subcarriers is done and then decision making process is performed to recover the transmitted data with better results even without using overburden transmission of pilot signals for adaptive receiver as presented in [7].

   1. Spreading process:

      In Direct Sequence spread spectrum transmission, the user data signal is multiplied by a code sequence. Mostly, binary sequences are used. The duration of an element in the code is called the "chip time

      Figure 1.1 DS-CDMA signal is generated by multiplication of a user data signal by a code sequence

      Fig. 1.1 User Data with PN code

      A CDMA receiver can retrieve the wanted signal by multiplying the received signal with the same code as the one used during transmission.

      QPSK

      modulation

      spreading

      IFFT

      Delay insertion

      QPSK

      modulation

      spreading

      IFFT

      Delay insertion

      Serial to parallel converter

      Serial to parallel converter

      Input data

      De spreading

      De spreading

      Parallel to serial converter

      Parallel to serial converter

      Fig 1.2 Transmitter architecture

      QPSK

      demodulation

      FFT

      Delay removal

      QPSK

      demodulation

      FFT

      Delay removal

      Channel equalization

      Channel equalization

      Output data

      Fig 1.3 Receiver architecture

   2. MC CDMA performance analyzes

   MC-CDMA takes the advantages of both CDMA and OFDM and makes an efficient transmission system for high data rate communication. Handicap in design phase of modem employing MC-CDMA advantages is computational complexity its implementation for high data rate communications for analyzing its performance in small and large scale fading channels.

   The system model for the proposed design is as follows: Information data (binary, image, audio and video) acquired from multiple users is transformed into Binary Phase Shift Keying (BPSK) matrix as this passband modulation provides significant simplicity in the system. The next step involves generation of the Variable length Walsh matrix according to the specifications of user. Flexibility in terms of size of Walsh matrix should be used to appropriately adjust the length of code, and thus number of computations, according to the condition of channel and number of users. Simulations were carried out to weigh the performance of the proposed design of MC-CDMA system in different channel configurations.

4. PERFORMANCE RESULTS

   The system is implemented using FPGA. Firstly Verilog HDL codes were written and then simulated the circuit design on TSE simulation software tool. FPGA implementation statistics are listed out in Table 1. Subsequently, MATLAB was used to analyze the BER performance of the implemented system. The MATLAB simulation

   tests were performed on communication tool box and Simulink programming. The simulation of variable rate transmission with BPSK modulation without forward error correcting code,has been carried out in MATLAB using Monte Carlo simulations. For multipath frequency selective channel, we have assumed 4-fold correlated Rayleigh fading [3], [9], [10] channel. Generation of correlated fades, for the purpose of simulation, has been discussed in [10]. First we will discuss the results assuming perfect phase synchronization and then the effect of phase jitters is evaluated.

   Fig 1.4. Simulated output

   Fig 1.5 RTL view

   Fig 1.6 BER analyzes of MC-CDMA

5. CONCLUSION

In this paper, we proposed multicarrier code division multiple access (MC-CDMA) mutliuser transceiver that achieves a data rate of minimum 1Gbps equivalent to the 4G standard of IEEE. In MC-CDMA scheme each data symbol is spreaded in frequency domain and transmitted on different subcarrier which eliminates frequency selective fading and show significant improvement in bit error rate performance. Simulations are carried out for all the possible data rate schemes, results show that for the given users and BER of proposed algorithm comparatively gives better results. Finally we synthesized the successfully verified scheme with QUARTUS II EDA tool.

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