Single Phase Seven Level MLDCL Inverter with Half Bridge Cell Topology

Single Phase Seven Level MLDCL Inverter with Half Bridge Cell Topology

Prachi Banda

Dept. of Electrical Engineering SATI, Vidisha

Madhya Pradesh, India

S. P. Phulambrikar Associate Professor & HOD Dept. of Electrical Engineering

SATI, Vidisha Madhya Pradesh, India

Abstract- This paper presents the implementation of Single Phase 7 level Multilevel DC link (MLDCL) Inverter with Half Bridge Cell topology. For N level inverter, (N-1)/2 half bridge cells are required with the same number of voltage sources. In this inverter topology, 3 Half Bridge Cells are used along with 3 voltage sources, each have 100V DC. These half bridges are connected in series to form a Multilevel DC Link (MLDCL). Power IGBTs are used as switching device. Each half bridge cell uses two IGBTs whereas H-Bridge requires four IGBTs. In this inverter topology, eight Power IGBTs along with gate drive circuit. Inverter topology, under study reduced power switches. The performance of inverter checked on single phase induction motor. THD of proposed topology is reduced and analyzed by FFT window. The results are observed by MATLAB/SIMULINK software.

Keywords- Cascaded Multilevel Inverter, Multilevel DC Link, Cascaded Half Bridge Cells, H Bridge, Total Harmonic distortion (THD).

I INTRODUCTION

In present era, there is huge demand of medium and high power in industries. They require improved speed control methods power quality to run motors in industries. When an in inverter fed an ac motor drive system, harmonics cause losses and pulsating torque in the motor. From the energy saving viewpoint, it is necessary to develop a high efficiency motor drive system. Multilevel inverter is used. it has many improved features then the two level inverter. The Multilevel inverters are basically three types, which are as 1) Diode clamped MLI, 2) Flying Capacitor MLI and

3) Cascaded H-bridge MLI [1-2]. Advantages of the multilevel inverters (MLIs) include: 1) the multilevel structures can ensure even voltage sharing, both statically and dynamically, among the active switches while it is difficult for a two-level inverter with a series connection of switches to do so; 2) substantial reduction in size and volume is possible due to the elimination of the bulky coupling transformers or inductors; and 3) multilevel inverters can offer better voltage waveforms with less harmonic contents and thus, can significantly reduce the size and weight of passive filter components.

This paper presents a new class of multilevel inverters based on an MLDCL and a bridge inverter[5]. In this paper we uses Cascaded H-bridge along with the half bridge topology to get the single phase seven level output voltage. The main bridge is cascaded H-bridge MLI which have four power switches and there are two half bridge cell which have only four power switches along with three same voltage sources. The Cascaded H-bridge MLI is shown in fig 1, for 7 level output voltage needed twelve power switches [3]. An induction motor is used as main load to perform the inverter output with LC filter.

II MODIFIED CONVERTER TOPOLOGY

Fig. 2 shows a schematic diagram of the modified inverter topology, which consists of a multilevel DC source and a single-phase full-bridge inverter [4]. The DC source is formed by connecting a number of half-bridge cells in series with each cell having a voltage source controlled by two switches. The two switches S(n-1)1 and S(n-1)2 operate in a toggle fashion. The cell source is bypassed with S(n-1)1 ON and S(n-1)2 OFF, or adds to the DC-link voltage by reversing the switches [5].

Fig 1: Seven level Cascaded H-bridge MLI

Figure 2. Structure of the proposed cascaded dc link MLI.

ology is shown in fig 3.

In modified topology the main single phase H-bridge system composes of four switches Q1, Q2, Q3 and Q4. The H-bridge inverter has two functions, it has to synthesis the inversion voltage of the dc link voltage plus generating the zero state voltage (OV) at the output voltage (Vab) by connecting the upper two switches (Ql, Q3) or the lower switches (Q2, Q4)· Hence this topology reduces the number of power switches as compared to Cascaded H- bridge MLI. The main simulink modal of modified top

Fig 3: Simulink model of proposed topology

III OPERATION OF SINGLE PHASE INVERTER TOPOLOGY

Working of this inverter is nothing but how we make IGBTs ON and OFF. We have generated a switching sequence to obtain staircase output which resembles nearly equal to sine wave. For different switching angles the power circuit behaves differently producing different waveforms. In this topology, we have generated 7 voltage levels as 0, 100V, 200V, and 300V. The circuit working for each level is described below:

1. For 0 voltage level

   Since S1, S2, S3, S4. S11, S12, S13 and S14 are OFF, the

   current will not pass through the bridge and hence it gives 0 V voltage level.

2. For 100V voltage level

   Since S1, S4, S13 and S11 are ON and S12, S14 are OFF, the voltage across load will gives 100V level.

3. For 200V voltage level

   Since S1, S4, S13 and S12 are ON and S14, S11 are OFF, the voltage across load will gives 200V level.

4. For 300V voltage level

   Since S1, S4, S14 and S12 are ON and S13 and S11, are OFF , the voltage across load will gives 300V level.

   The overall operation of inverter topology can also be understand by lookup table which is given in below table. Here 0 means switches are OFF and 1 means switches are ON.

   Table no. 1: Modified Multilevel Inverter Switching

   Voltage Level	3V	2V	V	0	-V	-2V	-3V
   S1	1	1	1	0	0	0	0
   S2	0	0	0	0	1	1	1
   S3	0	0	0	0	1	1	1
   S4	1	1	1	0	0	0	0
   S11	0	0	1	0	1	0	0
   S12	1	1	0	0	0	1	1
   S13	0	1	1	0	1	1	0
   S14	1	0	0	0	0	0	1

   IV CONTROL SCHEME

   Here we have used the pulse generator to generate the different switching waves to control the IGBT power switches. The smooth sine wave is produced by selecting the proper value of firing angles in pulse generator. Here is the different switching pulse is generated by pulse generator is shown in fig 4.

   In this topology there are total 8 IGBT is used to generate the desired 7 level output voltage across the load and the gate driver circuit needed is also eight required here. The gate driver circuit is pulse generator, which produces different pulses as per desired requirement to generate the 7 level output.

   Fig 4 Switching Pulses for Power Elements

   V CASE STUDY OF IMPLIMENTATION

   In this paper we uses an induction motor to analyze the motor main winding current, rotor speed and Electromagnetic torque, also observing the output voltage and total harmonic distortion(THD). The proposed topology with induction motor is shown below in fig 6, output voltage in fig 7 and motor parameters are shown in fig 8 respectively.

   Table no. 1: Induction Motor Parameters

   Parameters	Value
   Voltage	220 Volt
   Frequency	50Hz
   No. of Poles	2
   Speed	155 rad/sec

   Fig 5: Proposed topology with Induction Motor

   Fig 8: An induction motor parameters

   VI CONCLUSION

   Fig 6: Output voltage of single phase 7 level MLDCL

   Fundamental (50Hz) = 326 , THD= 9.81%

   7

   6

   Mag (% of Fundamental)

   5

   4

   3

   2

   1

   0

   0 2 4 6 8 10 12 14 16 18 20

   Harmonic order

   Fig no.7: Total Harmonic Distortion in proposed topology

   The single phase MLDCL inverter with half bridge cell requires less number of power switches as compared to single phase cascaded H-bridge multilevel inverter. These MLDCL inverters have cost less due to the savings from the eliminated gate drivers and fewer assembly steps because of reduced number of power switches, which leads to a smaller size and volume. One application area of this inverter is domestic where it can be used to provide single phase supply in the failure of mains supply. A part from this it can be used in industry for controlling and operation of single phase drive.

   REFERENCES

   1. Muhammad H. Rashid, Power Electronics: Circuits, Devices and Applications, 3rd edition, PHI, 2005.

   2. J. Rodriguez, J. S. Lai, and F. Z. Peng, "Multilevel inverters: A survey of topologies, controls and applications," Industrial Electronics, IEEE Trans. Ind. Electronics, vol. 49, no. 4, pp. 724-738, 2009.

   3. Maha G. Elsheikh, Mahrous E. Ahmed, Emad Abdelkarem, Mohamed Orabi, "Single-Phase Five-Level Inverter with Less Number of Power Elements," IEEE, ISBN no. 978-1- 4577-1250-0/11, 2011.

   4. Gui-Jia Su and Donald J. Adams, Multilevel DClink inverter,IEEE IAS 2002 Annual meeting.

   5. Mrs. N. Booma and Nagisetty Sridhar, Nine Level Cascaded H-Bridge Multilevel DC Link Inverter, Proceedings of ICETECT,2011.