Transmission Line Fault Analysis using Bus Impedance Matrix Method

DOI : 10.17577/IJERTV4IS030919

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Transmission Line Fault Analysis using Bus Impedance Matrix Method

Prajakta V. Dhole1

First Year Engineering Department, JSPM's Imperial College of Engg. & Research, Wagholi, Pune Savitribai Phule Pune University,

Pune, India

Abstract — The fault analysis is done for the three phase symmetrical fault and the unsymmetrical faults. The unsymmetrical faults include single line to ground, line to line and double line to ground fault. The method employed is bus impedance matrix which has certain advantages over thevenins equivalent method. The advantage of this approach over conventional method is to make the analysis of three typical un-symmetrical faults, namely single-line-to-ground fault, line-to-line fault and double-line-to-ground fault more unified. So it is unnecessary to cumbersomely connect three sequence networks when calculating the fault voltages at each bus and fault currents flowing from one bus to its neighboring bus.

Keywords- Bus impedance matrix; fault analysis; fault impedance; thevenins equivalent.

  1. INTRODUCTION

    The steady state operating mode of a power system is balanced 3-phase ac. However due to sudden external or internal changes in the system, this condition is disrupted. When the insulation of the system fails at one or more points or a conducting object comes in contact with a live point, a short circuit or fault occurs. A fault involving all the three phases is known as symmetrical (balanced) fault while one involving only one or two phases is known as unsymmetrical fault. Majority of the faults are unsymmetrical. Fault calculations involve finding the voltage and current distribution throughout the system during the fault. It is important to determine the values of system voltages and currents during fault conditions so that the protective devices may be

    set to detect the fault and isolate the faulty portion of the system.

  2. FAULTS IN A THREE PHASE SYSTEM

    1. Symmetrical three-phase fault

    2. Single line-to-ground fault (SLG)

      Farina S. Khan1

      First Year Engineering Department, JSPM's Imperial College of Engg. & Research, Wagholi, Pune Savitribai Phule Pune University,

      Pune, India

    3. Line-to-line fault (LL)

    4. Double line-to-ground fault (DLG)

    The most common type of faults by far is the SLG fault, followed in frequency of occurrence by the LL fault, DLG fault, and three-phase fault.

    Out of the above four faults, two are of the line-to- ground faults. Most of these occur as a result of insulator flashover during electrical storms. The balanced three- phase fault is the rarest in occurrence and the least complex in so far as the fault current calculations are concerned. The other three unsymmetrical faults will require the knowledge and use of symmetrical components. Unsymmetrical faults cause unbalanced currents to flow in the system. The method of symmetrical components is a very powerful tool which makes the calculations of unsymmetrical faults almost as easy as the calculations of a three-phase fault.

    To analyze un-symmetrical faults, one needs to develop positive-, negative-, and zero-sequence networks of the power system under study, based on which one further need to work out the impedance of three thevenin equivalent circuits as viewed from faulty point. Then the positive-, negative- and zero-sequence components of phase-a faulty-point-to-ground current can be calculated. To calculate three-phase currents flowing from one bus to its neighboring bus and three-phase voltages at each bus, one needs to connect three sequence networks uniquely for each type of fault. This may make circuit drawing very cumbersome. Furthermore by using the network with three sequence networks connected, it is impossible to appreciate the impedance matrix approach to calculate the sequence voltage at each bus when fault occurs.

    To overcome these two drawbacks, paper [1] introduces a new approach to unify the analysis of three typical unsymmetrical faults, namely single-line-to-ground fault, line-to-line fault and double-line-to-ground fault. This new method allows the analysis of three typical un-symmetrical faults to share all steps except one. The only different step is how to calculate the positive-, negative-, and zero- sequence components of phase-a-to-ground fault current at faulty point. It also makes impedance matrix approach more understandable when used to calculate the sequence voltages at each bus.

    All the above four faults (1, 2, 3, 4) are being solved using the bus impedance matrix.

    Fig. 1. Single line to ground fault

    Fig. 3. Double line to ground fault

  3. BUS IMPEDANCE MATRIX METHOD

    We can work out a universal representation of all three typical un-symmetrical faults. This representation is valid with the imposition of different fault conditions for each typical un-symmetrical fault, such as for the single-line-to- ground fault, such as for the single-line-to-ground fault, the fault conditions being Vka=ZfIfa, IfbIfc0.

    In the following formulation, per-unit system is adopted. Zero-sequence voltage at each bus contributed by equivalent current source is determined by

    Y0

    Y0

    .. Y0

    .. Y0 V0 0

    11 12 1k 1n

    1f

    21 22 2k 2n 2f

    Y0

    Y0

    .. Y0

    .. Y0 V0 0

    : : .. : .. : : :

    =

    Y0

    Y0

    .. Y 0

    .. Y0 V0 -I0

    k1 k2 kk kn

    kf fa

    Fig. 2. Line to line fault

    : : : : : :

    :

    :

    Y0

    Y0

    .. Y0

    .. Y0 V0 0

    n1 n2 nk nn nf

    where

    Y0

    Y0

    .. Y0

    .. Y0

    11 12 1k 1n

    Y0

    Y0

    .. Y0

    .. Y0

    Y0 =

    21 22 2k 2n

    : : .. : .. :

    Y0

    Y0

    .. Y 0

    .. Y0

    k1 k2 kk kn

    : : : : : :

    Y0

    Y0

    .. Y0

    .. Y0

    n1 n2 nk nn

    is the admittance matrix for the sub-transient or transient zero-sequence network.

    So

    V0 -Z0I0

    1f 1k fa

    2f

    2k fa

    Then

    V0 -Z0I0

    V0

    Y0

    Y0

    .. Y0

    .. Y0 0

    : :

    1f

    11 12 1k 1n

    =

    V0

    Y0

    Y0

    .. Y0

    .. Y0 0

    0

    -Z 0 I0

    2f 21 22 2k 2n

    Vkf

    kk fa

    : =

    : : .. : .. :

    :

    : :

    0

    0

    0 0 0 0 -I

    Vkf

    Yk1

    Yk2

    .. Y kk

    .. Ykn

    fa

    V0

    -Z0I0

    :

    : : : : : :

    :

    nf

    nk fa

    V0

    Y0

    Y0

    .. Y0

    .. Y0

    0

    In a similar way, positive-sequence voltage at each bus

    nf

    n1 n2 nk nn

    contributed by equivalent current source as is determined by

    0

    0

    Y1

    Y1

    .. Y1

    .. Y1 V1

    0

    11 12 1k 1n

    1f

    :

    Y1

    Y1

    .. Y1

    .. Y1 V1

    0

    = Z0 0

    -I

    21 22 2k 2n

    : : .. : .. :

    2f

    : :

    fa

    =

    :

    Y1

    Y1

    .. Y 1

    .. Y1 V1

    -I1

    k1 k2 kk kn

    kf fa

    0

    : : : : : : :

    :

    Y1

    Y1

    .. Y1

    .. Y1

    V1

    0

    Where,

    Z0

    Z0

    .. Z0

    .. Z0

    n1 n2 nk nn

    This gives

    nf

    11 12 1k 1n

    Z0

    Z0

    .. Z0

    .. Z0

    V1

    Z1

    Z1

    .. Z1

    .. Z1

    21 22 2k 2n

    1f

    11 12 1k 1n

    : : .. : .. :

    V1

    Z1

    Z1

    .. Z1

    .. Z1

    Z0 =

    2f 21 22 2k 2n

    Z0

    Z0

    .. Z 0

    .. Z0

    : : : .. : .. :

    k1 k2 kk kn

    =

    : : : : : :

    V1

    Z1

    Z1

    .. Z 1

    .. Z1

    kf

    k1 k2 kk kn

    Z0

    Z0

    .. Z0

    .. Z0

    :

    : : : : : :

    n1 n2 nk nn

    nf

    n1 n2 nk nn

    V1

    Z1

    Z1

    .. Z1

    .. Z1

    Z0

    Z0

    .. Z0

    .. Z0

    0

    0

    -Z1I1

    1k fa

    -Z1I1

    11 12 1k 1n

    2k fa

    Z0

    Z0

    .. Z0

    .. Z0

    21 22 2k 2n

    : :

    = : : .. : .. :

    -I1 = -Z 1 I1

    Z0

    Z0

    .. Z 0

    .. Z0

    fa

    kk fa

    k1 k2 kk kn

    : :

    : : : : : :

    Z0

    Z0

    .. Z0

    .. Z0

    0

    -Z1I1

    n1 n2 nk nn

    nk fa

    If pre-fault current is ignored, then the pre-fault voltage at each bus is the same and equal to that at fault bus k before fault occurs, which is assumed to be Vf. So the positive sequence voltage at each bus when fault occurs can be written as follows.

    Item

    Base MVA

    Voltage Rating

    X1

    X2

    X0

    G1

    100

    20 kV

    0.15

    0.15

    0.05

    G2

    100

    20 kV

    0.15

    0.15

    0.05

    T1

    100

    20/220 kV

    0.10

    0.10

    0.10

    T2

    100

    20/220 kV

    0.10

    0.10

    0.10

    TL1

    100

    220 kV

    0.125

    0.125

    0.30

    TL2

    100

    220 kV

    0.15

    0.15

    0.35

    TL3

    100

    220 kV

    0.25

    0.25

    0.7125

    V1

    V1 V1

    -Z1I1

    1f

    1

    1f

    Vf 1k fa

    V1

    V1

    V1

    V

    -Z1I1

    2f 2 2f

    : : :

    f

    :

    2k fa

    :

    = + = +

    V1

    V1

    V1

    Vf

    -Z 1 I1

    kf

    k

    kf

    kk fa

    :

    : : :

    :

    1

    1

    1 V

    1 1

    Vnf

    Vn

    Vnf

    f

    -Znk Ifa

    V -Z1I1

    f 1k fa

    f 2k fa

    V -Z1I1

    :

    =

    V -Z 1 I1

    f kk fa

    :

    V -Z1I1

    f nk fa

    In a similar way, the negative-sequence voltage at each bus can be computed by

    Fig. 4. Single line diagram 1

    V2 -Z2I2

  4. MATHEMATICAL ANALYSIS

    1f

    1k fa

    V2 -Z2I2

    2f 2k fa

    1. Sequence impedance networks

      : = :

      V2 -Z 2 I2

      Firstly let us obtain the sequence impedance

      kf

      :

      kk fa

      :

      networks. From the data given in table 4.1 the following positive, negative and zero sequence

      V2 -Z2I2

      impedance networks are obtained in fig.4.6, 4.7 and

      nf

      nk fa

      4.8 respectively.

      Z2

      Z2

      .. Z2

      .. Z2

      11 12 1k 1n

      21

      22

      2k

      2n

      :

      : ..

      :

      .. :

      Z2

      Z2

      .. Z2

      .. Z2

      Z2 =

      Z2

      Z2

      .. Z 2

      .. Z2

      k1 k2 kk kn

      : : : : : :

      Z2

      Z2

      .. Z2

      .. Z2

      n1 n2 nk nn

      TABLEI. POWER SYSTEM NETWORK PARAMETERS

      Fig. 5. Positive Sequence impedance network

      Fig. 6. Negative Sequence impedance network

      Fig. 9. Positive Sequence admittance network

      -j18.667 j8 j6.667

      Y2 Y1 j8 -j16 j4

      bus bus

      j6.667 j4 -j10.667

      Fig. 7. Zero Sequence impedance network

      Fig. 10. Zero Sequence admittance network

      -j8.690 j3.3333 j2.8571

      Y

      0

      bus

      = j3.3333 -j14.7368 j1.4035

      j2.8571 j1.4035 -j4.2606

    2. IMPEDANCE MATRICES

      The impedance matrices are obtained from the admittance matrices.

      Fig. 8. Positive Sequence admittance network

      1

      Z

      bus

      2

      = Z

      bus

      j0.1450 j0.1050 j0.1300

      = j0.1050 j0.1450 j0.1200

      j0.1300 j0.1200 j0.2200

      Z

      0

      bus

      j0.1820 j0.0545 j0.1400

      = j0.0545 j0.0864 j0.0650

      j0.1400 j0.0650 j0.3500

    3. Single Line To Ground Fault At Bus 3 Through A Fault Impedance Of J0.1

    At bus 1

    V0

    0-Z0 I0

    0-j0.14(-j0.9174)

    0.1284

    When single line to ground fault occurs, the sequence

    f1

    13 3 =

    =

    V1 = V1(0)-Z1 I1

    1-j0.13(-j0.9174) 0.8807

    components of fault current at bus three are given by

    f1 1 13 3

    V2 0-Z2 I2

    0-j0.13(-j0.9174)

    0.1193

    1 2 0

    Vk (0)

    f1 13 3

    I f3

    I f3

    I f3 = Z1

    +Z2

    +Z0

    +3Z

    At bus2

    kk kk kk f

    V0

    0-Z0 I0

    0-j0.065(-j0.9174)

    0.0596

    f2

    23 3

    = =

    V (0)

    V1 = V1(0)-Z1 I1

    1-j0.120(-j0.9174)

    0.8899

    = 3

    f2

    2 23 3

    Z1 +Z2 +Z0 +3Z

    V2 0-Z2 I2 0-j0.120(-j0.9174) 0.1101

    33 33 33 f

    100

    =

    f2 23 3

    At bus3

    j0.22+j0.22+j0.35+3(j0.1)

    V0 0-Z0 I0

    0-j0.35(-j0.9174)

    0.3211

    f3

    23 3

    = =

    V1 = V1(0)-Z1 I1

    1-j0.22(-j0.9174)

    0.7982

    100

    f3

    3 33 3

    = V2

    0-Z2 I2

    0-j0.22(-j0.9174)

    0.2018

    j1.09

    = -j0.9174 p.u.

    The fault current is

    f3 33 3

    The voltages during fault are At bus 1

    Va

    1 1 1 V0

    1 1 1 0.1284

    Ia

    1 1 1

    I0

    f1

    f1 = 1 a2

    a

    f3 f3

    Vb = 1 a2

    a V1

    0.8807

    b 2

    0

    f1

    f1

    2

    If3 =

    1 a a If3

    Vc 1 a a2 V2

    1 a a

    0.1193

    Ic

    1 a a2 I0

    f1 f1

    f3

    f3

    0.63300

    = 0

    0 1.0046120.45

    3If3

    1.0046120.450

    = 0

    0

    At bus 2

    Va

    1 1 1 V0 1 1 1 0.0596

    3(-j0.9174)

    f2

    f2 2

    Vb = 1 a2 a V1

    = 1 a a 0.8899

    f2

    f2

    f2 f2

    = 0

    0

    Vc 1 a a2 V2

    1 a a2 0.1101

    0.720700

    -j2.7522

    = 0.9757117.430

    = 0

    0.9757117.430

    0

    At bus 3

    2.7523 900

    Va

    1 1 1 V0

    1 1 1

    f3

    f3

    0.3211

    = 0

    Vb = 1 a2

    a V1

    = 1 a2

    a 0.7982

    f3

    f3

    0

    Vc

    1 a a2 V2 1 a a2 0.2018

    The symmetrical components of voltages during fault at buses 1, 2 and 3

    f3

    f3

    0.275200

    = 0

    1.0647125.56

    1.0647125.560

  5. CONCLUSION

    This paper presents a method to tackle typical un- symmetrical faults. It is found that the bus impedance matrix method involves comparatively less computations than the thevenins equivalent method. The proposed approach has another advantage over traditional method that it is more intuitive when matrix approach is adopted to tackle a fault problem.

  6. REFERENCES

  1. Daming Zhang,An alternative approach to analyze un- symmetrical faults in power system. TENCON 2009, from ieeexplore.

  2. B. R. Gupta, Power System Analysis and Design, published by S. Chand and Company Ltd., p.265.

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