Multilevel Inverter Fed Induction Motor Drive using PWM Technique

DOI : 10.17577/IJERTV6IS060169

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Multilevel Inverter Fed Induction Motor Drive using PWM Technique

Three level inverter using Induction Motor Drive

Handge Madhuri Madhukar Department of E&TC Engineering, S.N.J.Bs KBJ COE, Chandwad,

Dist. Nasik, India.

Prof. Tated Kavita S. Department of E&TC Engineering, S.N.J.Bs KBJ COE, Chandwad, Dist. Nasik, India.

AbstractThis paper makes a humble attempt to design and implement a variable frequency control of three phase induction motor using PWM technique for three phases MOSFET based inverter using three phase induction motor drive. PWM is employed in wide verity of applications like power control and conversion. To handle high voltage, high power and increase levels of inverter diode clamped multilevel inverter is designed here. It fulfills higher torque requirement and reduced total harmonic distortion which are advantageous part of paper. In this paper, a three level multilevel inverter is proposed. This could be extended to higher levels of voltage waveform and can be used in photovoltaic cell.

Keywords Induction motor drive; MOSFET based inverter; PWM; Total harmonic distortion; Variable frequency control.

I.INTRODUCTION

In recent years, Industry demand high power equipment from which the concept of multilevel inverters has been introduced since 1975 for high power applications. The term multilevel began with the three-level inverter. Multilevel inverter not only gives high power ratings, but also enables the use of low power application in renewable energy sources like photovoltaic cells, wind, and fuel cells which can be easily interfaced to multilevel inverter drive for high power applications.

A multilevel inverter has several advantages over a conventional two-level inverter; it uses variable switching frequency pulse width modulation (PWM). To implement multilevel inverter most popular methods are diode clamped inverter, capacitor clamped inverter, cascaded H-bridge inverter. The higher levels of inverter large number of components are require such as Clamping diodes, Clamping capacitors, number of DC sources (for cascaded H-Bridge) and Complicated PWM technique. Still in this paper proposed topology require fewer components, free from voltage unbalancing problems and reduced complexity when compared to other topologies. The diode clamped inverter gives multiple voltage levels from a series bank of capacitor. The voltage across switches is half of DC bus voltages. It is advantageous to double the power rating of semiconductor devices.

  1. Diode clamped three level inverter

    In the diode-clamped inverter, the DC-bus voltage is split into three-levels by two series-connected bulk capacitors, and two diodes clamp the switch voltage to half of the level of the DC-bus voltage. The output voltage has states: 3Vdc, 2Vdc, Vdc, 0, -Vdc, -2Vdc, -3Vdc. All of the phases sharing a common dc bus, which minimizes the capacitance requirements of the inverter. For this reason, a back-to-back topology is not only possible but also practical for uses such as high-voltage back-to-back inter-connection and variable speed drive [7], [8]. Two series-connected switches of the diode-clamped inverter can achieve the multi-level output waveforms and reduce the voltage stress to half of the input voltage.

    Fig.1.Circuit diagram of three level inverter using diode clamped

    topology.

  2. PWM technique for multilevel inverter

    Multilevel PWM methods uses variable switching frequency carrier waves in comparison to the reference waves to generate a sinusoidal output wave [1]. PWM technique was used to eliminate harmful low-order harmonics in input and output voltage and current of static power. In PWM control, the inverter switches are turned ON and OFF several times during a half cycle and output voltage is controlled by varying the pulse width. To reduce harmonic distortions in the output signal phase-shifting techniques are use. The inverters of the pulses are varied by changing the amplitude of the sinusoidal wave form. In this method the lower order harmonics are get eliminated. As the switching for increases

    more harmonics can be eliminated. The limiting factors are the switching devices speed, switch losses & power ratings. Multilevel inverters can operate at both fundamental switching frequency and high also variable switching frequency PWMThe following fig.2 shows multicarrier PWM output.

    Fig.2. Multicarrier PWM output waveform.

    The proper switching combination of switches A to B as shown in Table.1 the positive half cycle can be generated. This positive half cycle can be converted in to negative half cycle by means of bridge converter circuit.

    Table.1. Switching states for three-level inverter

    Output

    voltage

    A

    B

    A

    B

    Vdc

    1

    1

    0

    0

    0

    0

    1

    1

    0

    -Vdc

    0

    0

    1

    1

    To produce a quasistable-output voltage, consider one leg of the three-level inverter, as shown in Fig.1. The steps to synthesize the three-level voltages are as follows:

    • For an output voltage level , turn on switches A and B.

    • For an output voltage level, turn on switch A and one lower switch B.

    • For an output voltage level0, turn on switches B and A.

      Fig.3.Three level proposed PWM waveform

      The proposed three level output is given in fig.3 due to conducting switching pairs explained in table.1 and fig.4 shows actual output waveform of three level fed induction motor drive[5].

      Fig.4. Output waveforms of three level inverter using PWM

      technique.

      1. INDUCTION MOTOR DRIVE

        Fig.5. Block diagram of Multilevel fed induction motor drive.

        There are two sections in this system a power circuit and a control circuit. The power section consists of a power supply and three phase diode clamped multilevel inverter. The triggering circuit using PWM technique with VCO and opto- isolator circuitry, signal amplier to generate 12 gating pulses to drive MOSFET based power inverter circuit under controlling section [3]. AC input is rectied using a diode rectier. It is ltered using a capacitor lter [4]. DC is applied to the multilevel inverter. The output of the inverter is fed to the induction motor. Input pulses to the MOSFETs are generated by the PWM IC [10]-[12]. The phase voltage and line to line voltages are measured by the oscilloscopes connected at the output shown in fig.5.

      2. VARIABLE FREQUENCY CONTROL

        The / technique used to control the speed of induction motor at different rates. For continuously variable speed operation, output frequency of multilevel inverter should be varying. To maintain constant motor flux, input voltage to motor also varied in linear proportion to supply frequency [6]. That is the voltage and frequency reaches the rated values. The voltage and frequency can be increased up to base speed and also drive motor beyond the base speed by increasing frequency further. But the applied voltage cannot be increased beyond rated voltage. So the choice is only frequency variation, which results in the field weakening and torque available get reduced. To achieve maximum torque we need to

        keep air gap ux constant. This is done by keeping the voltage to frequency ratio constant:

        = (1)

      3. RESULT AND ISCUSSION

        The proposed multi-level inverter fed induction motor drive can considerably reduce the total harmonic distortion and increases power rating. Output waveform gives resulting three levels with 120° phase shifted pulses.

        Fig.6. Hardware setup of three level inverter fed induction motor drive.

        Fig.7. Output waveforms of phase shifting gate triggering pulses. Table.2. Performance of multilevel inverter fed induction motor drive.

        Parameters

        Voltage(Vp-p)

        Speed (rpm)

        Phase voltage

        VRN

        380

        735

        VYN

        360

        720

        VBN

        346

        714

        Line voltage

        VRY

        560

        1050

        VYB

        548

        1055

        VRB

        539

        1060

      4. ACKNOWLEDGMENT

        It is with great pleasure that I express my deep sense of gratitude to my guide Prof. K. S. Tated, Prof. Kulkarni for valuable guidance, constant encouragement and patience throughout this work.

      5. CONCLUSION AND FUTURE SCOPE

In this paper, multilevel topology in three-level inverter fed induction motor drive is implemented. In three-level inverter circuit diode clamped MOSFET based inverter used for reducing the switching devices and higher reliability. It can be observed that in the higher levels THD is reduced with PWM technique [2].

In addition, since the average value of the phase voltages to the ground during one period is zero, the neutral point can be connected to the ground and it can be applied to a transformer-less grids connected photovoltaic (PV) and fuel cell power conditioning system in future applications [9].

REFERENCES

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  2. Alex Ruderman,About Voltage Total Harmonic Distortion for Single- and Three-Phase Multilevel Inverters, IEEE Transaction on industrial electronics, vol. 62, No. 3, March 2015.

  3. Won-Sik Oh,Sang-Kyoo Han, Seong-Wook Choi and Gun-Woo Moon, A Three Phase Three-level PWM Switched Voltage Source Inverter with Zero Neutral Point Potential, Journal of Power Electronics, Vol. 5, No. 3, July 2005.

  4. Mr. G. Pandian, Dr. S. Rama Reddy, Implementation of Multilevel Inverter-Fed Induction Motor Drive, Journal of Industrial Technology Volume 24, Number 1 – April 2008 through June 2008.

  5. K.Ramani, Dr.A.Krishanan Smieee, An estimation of multilevel inverter fed induction motor drive, International Journal of Reviews in Computing,E-ISSN:2076-3336.

  6. S.Flora Viji Rose, Mr.B.V.Manikandan,Simulation and Implementation of Multilevel Inverter Based Induction Motor Drive, IEEE Transaction on Industrial Electronics, vol.54, no.6, Dec 2007.

  7. K.Ilvesetal, A new modulation method for the modular multilevel converter allowing fundamental switching frequency, IEEE Transaction on Power Electronics, vol. 27, no. 8,pp. 34823494, Aug. 2012.

  8. W.Yong and W. Fei, Novel three-phase three-level-stacked neutral point clamped grid-tied solar inverter with a split phase controller, IEEE Transaction on Power Electronics,vol. 28, no. 6, pp. 28562866, Jun. 2013.

  9. Z.Li et al., A family of neutral point clamped full-bridge topologies for transformerless photovoltaic grid-tied inverters, IEEE Transaction on Power Electronics, vol. 28,no. 2, pp. 730739, Feb. 2013.

  10. A.Venkadesan, Priyatosh Panda, Priti Agrawal, Varun Puli,Cascaded H-Bridge Multilevel Inverter For Induction Motor Drives, International Journal of Research in Engineering and Technology- eISSN:2319-1163,pISSN:2321-7308.

  11. Ms. Preeti, Prof. Ravi Gupta,Switching of Three Phase Cascade Multilevel Inverter Fed Induction Motor Drive, Advance Research in Electrical and Electronic Engineering (AREEE) Print ISSN : 2349- 5804; ISSN : 2349-5812; Volume 2,Number 5; April June, 2015 pp 36 40.

  12. Ammar Masaoud, Hew Wooi Ping, New Three-Phase Multilevel Inverter With Reduced Number of Power Electronic Components, IEEE Transaction on Power Electronics, vol. 29, No. 11, November 2014.

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