- Open Access
- Total Downloads : 13
- Authors : Neha Niharika, Swatantra Kumar
- Paper ID : IJERTCONV5IS10045
- Volume & Issue : ICCCS – 2017 (Volume 5 – Issue 10)
- Published (First Online): 24-04-2018
- ISSN (Online) : 2278-0181
- Publisher Name : IJERT
- License: This work is licensed under a Creative Commons Attribution 4.0 International License
Design of Operational Transconductance Amplifierer based Multiplier
Neha Niharika Swatantra Kumar
HMR Institute of Tecnology Sharda University
Electrical & Electronics Department Electronics and Communication Department
Delhi Greater Noida, India
Abstract- In recent years interests have been seen in wireless system and software radio using sigma-delta modulators to digitize signals near the front end of radio receivers. Such applications necessitate clocking the modulators at a high frequency (MHz or above). A continuous-time implementation using transconductors and integrators rather than discrete time implementation using switched capacitors is preferred for high frequency operation. OTA based multiplier containing two OTAs and transistor connected diode is based on 0.3µm pwell CMOS technology simulated using Pspice software.
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INTRODUCTION
The OTA is a programmable device and has only a single high-impedance node, in contrast to conventional op amps. This makes the OTA an excellent device candidate for high- frequency and voltage (or current) programmable analog basic building blocks.The applicability of OTA based multiplier as components in the design of linear networks has been extensively discussed. The multiplier has gigahertz frequency response is suitable to use in communication system. Excellent contributions are reported of OTA based multiplier dealing with particular important nonlinear problems. In this paper, rather than try to tackle a specific problem, we focus our attention on a general approach dealing with multiplier. Nothing special is done to optimize the circuit performance but rather to explore the potential and applicability of the OTA-based Multiplier in communication systems.
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OTA BASED MULTIPLIER DESIGN
A two-input four-quadrant multiplier has an output current given by
I 0 = Km V1 V2 (1)
where the multiplier constant Km has units of amperes per square volt.
If V1 and V2 can take any positive or negative sign, the multiplier is called a four-quadrant multiplier.
shown in Fig. 1(b) and 1(c).The triangular block labeled a represents a signal attenuation (with an attenuation factor a); its function is to equalize the maximum voltage swing of V1 and V2..
V BIAS is the usual-bias control of the OTA The two options of Fig. 1(b) and Fig. 1(c) allow us to change the sign of Km . Thus for the circuit of Fig. 1(b) we obtain
I01 = gm1 V1 = K(VI1 +VSST ) V1 (2)
I02 = – gm2 V1 = – K(V I2 +V SST) (3)
Where K is a process and geometry dependent constant, VSST = VSS Vt , and Vt is a transistor threshold voltage V1
I0
V2
KM
(a) + I01
–
VI2
V1 a I0
-VBIAS
–
+ I02
VI1
This OTA based multiplier is represented in Fig.1(a). The corresponding OTA-based implementations are
V2 a
-VBIAS
(b) Therefore, we can make the sign of KM positive or negative.
M22
M3 M5
M6 M10
M12
M2SJ102 V9
+ I01
M2SJ102 M23
M24
M2SJ102
M2SJ102 M2SMJ21S0J2102 M9
M11
M21 5v
M2SJ102
M2SJ102 M13 0
– M2SJ102
M1
M2 M4
M2SJ102
M7 M8
M14 M15
M2SJ102
M2SJ102
M2N6659 M2N665M92N6659 M2N6659M2N6659 M2N6659M2N6659
0
M16
M17
V1 V2
I0
-VBIAS
M80
M81
M78
M2N6659 M79
M76
M2N6659 M77
M74
M2N6659 M75
M2SJ102 M19
M2SJ102
M2SJ102 M18
M2SJ102
0 V13
2vdc
0
M2N6659
M2N6659
M2N6659 V10
5v
0
V R5
1k
– I02
+
M41
M47
M42
M48
M43
M49
M44
M50
M45
M51
M46
M52
0
V11
5v
0
M53 M54
M55
M56
M57
M58
M59
a
(c)
-VBIAS
R1
V4 V 1k
VOFF = 0v
VAMPL = 2 FREQ = 1KHZ
VOFF = 0V VAMPL = 1 FREQ = 1KHz
R2 R3V
1k 1k
V21
0
V
M88
M89
V18
M86
M87
M84
M85
M82
M83
0
M93
M25
M2N6659 M20
M2N6659 M91
V16
5v
Fig. Multiplier: (a) symbol, (b) OTA implementation 1, and (c) OTA implementation 2, 0< a <1.
V I1 = a0 V BIAS = – V BIAS (3a)
V I2 = aV 2 V BIAS (3b)
The output current,
I 0 = I 01 + I 02 , (3c)
Put the values of I 01 and I 02 , in equation 3(c). Thus the output current becomes
I 0 = [K(-V BIAS + V SST ) K(a V 2 V BIAS + V SST ) )] V 1
Or
I 0 = a K V1 V2 = K M V1 V 2 , (4) K M = a K
A similar analysis of the circuit of Fig. 1(c) gives I 0 = – a K V1 V2 , K M = – a K
2vdc 0
0 0
Fig.4 Internal circuit diagram of OTA Based multiplier.
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EXPERIMENTAL RESULTS OF OTA MULTIPLIER
The structure used is as shown in Fig. 4. The measured value of KM is 3.3 pA/V2. The output current was measured across a 100-k load resistor.
The nonlinearity error is shown in Fig. 5 For V2 is 2V signal is applied, while keeping V1 equal to 1 V.
Fig. 6 shows the multiplier being used as a modulator where both input signals are sinusoidal.
1V. CONCLUSION
A Multiplier based on OTA is proposed. The multiplier has gigahertz frequency response is suitable to use in communication system for high frequency applications. The circuit is based on 3.0 m pwell CMOS technology simulated using PSPICE software.
This technique provides; wide dynamic range, MHz- bandwidth response and low power consumption. The proposed circuit has been simulated with PSPICE software. The primary application for an OTA is however to drive low-impedance sinks such as coaxial cable with low distortion at high bandwidth. Hence, improved OTA such as the MAX436 has optimized.
REFERENCES
Fig.5 Nonlinearity multiplier error: fixed V2=1 V and variable VI.
Fig. 6 Multiplier as modulator
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Edgar Sanchez Sinencio, seniormember, IEEE, Jaime, Ramirez
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http://www.itervis.com/simulation-and-layout-design-of-ota- amplifier/
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R. L. Geiger and E. Sánchez-Sinencio, "Active Filter Design Using Operational Trans conductance Amplifiers: A Tutorial," IEEE Circuits and Devices Magazine, Vol. 1, pp.20-32, March 1985.
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https://en.wikipedia.org/wiki/Operational_transconductance_ampl ifier.