Analysis and Simulation of UPFC for Power Flow Control using PI-Controller

Analysis and Simulation of UPFC for Power Flow Control using PI-Controller

Naveen M R

Student, M.E (Power and Energy Systems), Department of Electrical Engineering, UVCE, Bangalore University,

Bengauluru, India.

Dr. T. S. Prasanna

Professor,

Department of Electrical Engineering, UVCE, Bangalore University, Bengauluru, India.

Abstract To keep up a stable and efficient power system with ever-increasing demand there is a rapid development in power electronics that introduces the FACTS devices which can solve the instability problems easily and effi- ciently. The predominant FACTS device Unified Power Flow Controller (UPFC) is a solid-state controller that can be used to control active and reactive power flow in transmission lines. In this paper, we use a PI controller strategy for UPFC to regulate power flow as well as voltage at corresponding buses. The control strategy is evaluated using Matlab/Simulink for IEEE-9 bus power system net- work.

Keywords: FACTS, UPFC, STATCOM, SSSC, IPFC, TCSC, PI, SVS, VSC.

1. INTRODUCTION

   The present power system consisting of a complex power system network with the number of generating units intercon- nected. This complexity introduces instability and reduces the efficiency of the power system. The receiving and sending end voltages, phase angle between them and line impedance deter- mines the transmitted electrical power over a line. FACTS [1,3] devices can enlarge the maximum power carrying capacity and control power flow of existing transmission lines. In general, the FACTS controller can be classified as a mechanical switch, voltage source converter (VSC) and hybrid devices. Different types of VSC FACTS devices are presented in fig. 1, such as Static Synchronous Compensator (STATCOM) [3] and Static Synchronous Series Compensator (SSSC) [3] are the one-port controller and Unified Power Flow Controller (UPFC) [2,3] and Interline Power Flow Controller (IPFC) [3] are the two- port controllers.

   STATCOM

   natural power-sharing between the two different parallel trans- mission lines and therefore allows the maximum transmission capacity for effective utilization. The UPFC is the series-shunt combined type FACTS controller. It is used to regulate real, reactive power and bus voltage. In this paper, the application of UPFC in power flow control in IEEE-9 [4] bus power system is investigated and the phasor model [8] of UPFC is used. Matlab/Simulink software package is used for the simulations.

2. UNIFIED POWER FLOW CONTROLLER

   The UPFC is a generalized synchronous voltage source (SVS), represented at the fundamental frequency by voltage phasor Vpq with controllable magnitude Vpq (0 Vpq Vpq max) and angle (0 2), in series with the transmission line and viewed as elementary two machine system in Figure 2. In this functionally unlimited operation, which clearly includes volt- age and angle regulation, the SVS generally exchanges both re- active and real power with the transmission system.

   Fig. 2. Conceptual representation of the UPFC as two-machine power system.

   The UPFC consists of two voltage source converters, as dis- played in Figure 3. These back-to-back converters labelled "VSC-1" and "VSC-2". These are operated from a common dc link provided by a dc storage capacitor. As indicated before, this arrangement functions as an ideal ac-to-ac power converter in which the real power can freely flow in either direction be- tween the ac terminals of the two converters, and each con- verter can autonomously generate (or absorb) reactive power at

   UPFC

   VSC

   IPFC

   its own ac output terminal.

   SSSC

   Fig. 1. Different FACTS devices based on VSC

   UPFC is one of the most adaptable and a better FACTS device which can provide superior power flow and enhance- ment of the power system stability. Several articles and tech- nical literature are found on utilizing UPFC in power system. Thyristor Controlled Series Compensator (TCSC) [3] and

   UPFC are commissioned in the power system to regulate the Fig. 3. UPFC connection diagram to the power system

   VSC-2 provides the main function of the UPFC by injecting a voltage Vpq with controllable magnitude Vpq and phase angle in series with the line via series transformer at VSC-2 side. This injected voltage acts essentially as a synchronous ac volt- age source. The transmission line current flows through this voltage source resulting in real and reactive power exchange between it and the ac system. The reactive power exchanged at the ac terminal is generated internally by the converter. The real power exchanged at the ac terminal is converted into dc power which appears at the dc-link as a positive or negative real power demand.

   The basic function of VSC-1 is to supply or absorb the real power which is demanded by VSC-2 at the common dc link to maintain the real power exchange resulting from the series volt- age injection. This dc link power demand of VSC-2 is con- verted back to ac by the VSC-1 and coupled to the transmission line bus via shunt connected transformer. In addition to the real power need from VSC-2, VSC-1 can also generate or absorb controlled reactive power if desired, and thereby provide shunt reactive compensation independently for the line. Since there is a closed direct path for the real power negotiated by the action of series voltage injection through VSC-1 and 2 back to the line, the corresponding reactive power is supplied or absorbed lo- cally by VSC-2 and therefore does not have to be transmitted by the line. Thus, the VSC-1 can be operated at a upf (unity power factor) or be controlled to have a reactive power ex- change with the transmission line, independent of the reactive power exchanged by VSC-2. But there is no reactive power flow through the dc-link between the converters.

   With reference to fig. 2, the transmitted power P and the reactive power -jQr, supplied by the receiving end, can be ex- pressed as follows [3,9]:

   are the real and reactive power transmission of the uncompen- sated power system at a given angle . Since angle is freely shifting between 0 to 2 at any given transmission angle (0 ), it follows that Ppq() and Qpq() are well- regulated be- tween -VVpq/X and +VVpq/X independent of angle .

   Therefore, the transmittable real power P is regulated be- tween

   (9)

   and the reactive power Qr is regulated between

   (10)

   at any transmission angle .

3. SYSTEM UNDER STUDY AND SIMULATION PARAMETERS

   A UPFC is used to control the power flow in IEEE 9 power system network as shown in the Fig. 4.

   Where,

   (1)

   (2)

   (3)

   (4)

   Fig. 4. Single line diagram of power system under study.

   The simulation bock diagram of the power system with a UPFC in Matlab/Simulink environment is shown in Figure 5.

   Optimal allocation of UPFC was concluded by the results obtained by the Newton Raphson method of power flow analysis carried on IEEE-9 [5] bus system. Table I shows the Voltage data at all the buses cosidering 100MVA base.

   Bus No.	Voltage Measured
   	Magnitude	Angle
   1	1.04	0.00
   2	1.025	9.17
   3	1.025	4.56
   4	1.026	-2.23
   5	0.996	-4.00
   6	1.013	-3.70
   7	1.026	3.62
   8	1.016	0.63
   9	1.032	1.87

   Bus No.	Voltage Measured
   	Magnitude	Angle
   1	1.04	0.00
   2	1.025	9.17
   3	1.025	4.56
   4	1.026	-2.23
   5	0.996	-4.00
   6	1.013	-3.70
   7	1.026	3.62
   8	1.016	0.63
   9	1.032	1.87

   TABLE I. VOLTAGE MEASUREMENT FROM IEEE 9 NETWORK

   By substituting equations 2, 3 and 4 in equation 1, we ob- tain the expression for P and Qr,

   (5)

   (6)

   Where,

   and

   (7)

   (8)

   From Table I, the magnitude of voltage at bus-5 is 0.996 pu and its phase angle is -4.00 deg. Since the voltage at bus 5 is considerably low when compared to voltage at all the buses, UPFC is allocated nearer to bus-5.

   Fig. 5. Matlab/Simulink diagram of the IEEE-9 bus system with a UPFC

   Matlab/Simulink simulation model is shown in the Fig. 5. The internal model configuration of UPFC is shown in Fig.6. Data configuration of UPFC simulink model is given in Table II.

   Parameters	Values
   Shunt and Series converter rating	100MVA
   Power Regulator gains	KP = 0.025 and KI =1.5
   Vac Regulator gains	KP = 5 and KI = 1000
   Current Regulator gains	KP = 0.1667 and KI = 8.3333
   Bypass breaker	Initially closed and opens at t = 10s
   P reference	-0.63 pu.
   Q reference	0.3 pu.
   DC link nominal voltage	40kV
   DC link capacitance	750e-6 F

   Parameters	Values
   Shunt and Series converter rating	100MVA
   Power Regulator gains	KP = 0.025 and KI =1.5
   Vac Regulator gains	KP = 5 and KI = 1000
   Current Regulator gains	KP = 0.1667 and KI = 8.3333
   Bypass breaker	Initially closed and opens at t = 10s
   P reference	-0.63 pu.
   Q reference	0.3 pu.
   DC link nominal voltage	40kV
   DC link capacitance	750e-6 F

   Fig. 6. Inside view of UPFC block. TABLE II. UPFC BLOCK PARAMETERS

   Pref and Qref values are power flow controlling parameters which are initialized such that, these value increase/decrease

   the power flow through the corresponding line as per the equa- tions 9 and 10, as well as its values never cause any instability or congestion of any power system parameter at any point of the power system parameter.

4. SIMULATION RESULTS

   To control the Voltage Source Converter (VSC) (i.e., both VSC-1 and 2) PI controller [6,7,9] is used. PI controller is necessary not only for UPFC control and also in order to damp out the oscillations in power systems. The proportional and in- tegral gain constants used for power, voltage and current regu- lation are given in Table II. Matlab/Simulink simulation time called out for 20s. UPFC bypass switch is opened at 10s. The obtained injected series voltage and its phase angle is shown in Figure 7.

   Fig. 7. Injected series voltage

   This injected voltage of magnitude 0.17V and phase angle of -65 deg. causes change in active and reactive power flow through the line connecting bus-5 and 7. After the inject of se- ries voltage at bus-5, at 10s the improvement of voltage profile at all buses as well as increase in active power through the cor- responding line is noticed and same is shown in fig. 8. fig. 9 and table III. gives the active power changes at all buses before and after the switching of UPFC.

   Fig. 8. Change in power flow through line 5-7 without and with UPFC

   From fig. 8, it indicates that active power flow has in- creased from 43.23 MW to 63.00 MW i.e., increase of 45.75%. And reactive power is compensated by controlling re- active power flow through the line 5-7, it changes from -4.24 MVAR to -30.01 MVAR, to increase voltage profile in the sys- tem. Further the generation from slack bus i.e., swing generator is reduced from 129.2 MW to 124.6 MW i.e., a decrease of 3.5

   %, nothing but losses are reduced by 4.58 MW and can be seen in the fig. 9 and table 3.

   Fig. 9. Change in Active Power flow at all buses TABLE III. ACTIVE POWER FLOW CHANGES AT BUSES

   Bus No.	Without UPFC in MW	With UPFC in MW
   1	129.2	124.6
   2	98.97	109.2
   3	66.84	69.74
   4	128.7	124.1
   5	42.8	62.5
   6	30	16.7
   7	98.61	108.8
   8	-54.36	-43.8
   9	-36.19	-52.6

   And the changes in the reactive power at all bus is shown in the Table IV, followed by figure 10.

   Bus No.	Without UPFC in MVAR	With UPFC in MVAR
   1	-27.77	-26.15
   2	-20.87	-32.5
   3	-14.5	-18.13
   4	-32.62	-30.63
   5	68.58	56.7
   6	16.4	25.42
   7	-24.72	-37.01
   8	-15.96	-29.05
   9	19.84	12.68

   Bus No.	Without UPFC in MVAR	With UPFC in MVAR
   1	-27.77	-26.15
   2	-20.87	-32.5
   3	-14.5	-18.13
   4	-32.62	-30.63
   5	68.58	56.7
   6	16.4	25.42
   7	-24.72	-37.01
   8	-15.96	-29.05
   9	19.84	12.68

   TABLE IV. REACTIVE POWER CHANGES AT BUSES

   Fig. 10. Change in Reactive Power at all buses

   As given in table II, to control the flow of active and reactive power at through the line connecting bus-5 and 7 using UPFC, the control or the reference values Pref = -0.63 pu and Qref = 0.3 pu are set from 10s to stop time. The active and reactive power following the reference set by UPFC is shown in figure 11.

   Fig. 11. Active and Reactive Power through the line following reference value

   Change in positive sequence voltage profile of all the buses, before and after the introduction of UPFC is represented in the Figure 12 followed by Table V.

   Bus No.	Voltage Without UPFC		Voltage With UPFC
   	Magnitude	Angle	Magnitude	Angle
   1	0.954	-33.14	0.962	-31.56
   2	0.955	-32.64	0.989	-35.08
   3	0.956	-33.11	0.974	-33.99
   4	0.962	-34.09	0.968	-33.31
   5	0.977	-39.12	0.976	-36.33
   6	0.948	-37.89	0.959	-37.11
   7	0.963	-34.55	1.00	-37.05
   8	0.950	-36.95	0.98	-38.78
   9	0.962	-34.73	0.982	-35.61

   Bus No.	Voltage Without UPFC		Voltage With UPFC
   	Magnitude	Angle	Magnitude	Angle
   1	0.954	-33.14	0.962	-31.56
   2	0.955	-32.64	0.989	-35.08
   3	0.956	-33.11	0.974	-33.99
   4	0.962	-34.09	0.968	-33.31
   5	0.977	-39.12	0.976	-36.33
   6	0.948	-37.89	0.959	-37.11
   7	0.963	-34.55	1.00	-37.05
   8	0.950	-36.95	0.98	-38.78
   9	0.962	-34.73	0.982	-35.61

   Fig. 12. Voltage changes at all buses TABLE V. VOLTAGE CHANGES AT BUSES

   From figure 12 and Table V, the improvement in voltage profile at all buses are noted and essentially all are well within standard limit.

5. CONCLUSION

The main abilities of UPFC are voltage regulation, reactive power compensation and power flow control. The FACTS are integrated in power system to regulate the power flow in ap- propriate lines as well as to improve the security of transmis- sion line. UPFC is one of the most secured FACTS device for power flow control and enhancing the stability of power sys- tems. This paper concludes the influence of UPFC in IEEE-9 bus power system to improving stability by injecting voltage into the transmission lines to achieve better voltage profile at all buses and by regulating both power and voltages. With an advanced optimal allocation algorithm of FACTS devices and better control techniques of VSCs in UPFC, better results can be obtained and same can be simulated on different power sys- tem network using Matlab/Simulink.

REFERENCE

1. N.G. Hingorani, Flexible AC Transmission System (FACTS), Inter- national Conference on AC and DC Power Transmission, London, UK, 1991.

2. L. Gyugyi, Unified Power flow concept for flexible AC transmission systems, IEEE Proceedings, volume 139, no. 4, pp. 323332, 1992.

3. G. Hingorani and L. Gyugyi, Understanding FACTS: concepts and technology of flexible AC transmission systems, IEEE Press, 2010. Journal of Engineering and Development, Vol. 15, No.4, Dec 2011.

4. Hongyan Teng, Chongru Liu, Minxiao Han, Shiying Ma, Xiaojiang Guo, IEEE-9 Buses System Simulation and Modelling in PSCAD, 2010 Asia-Pacific Power and Energy Engineering Conference, Chengdu, China.

5. JP Bérard, OPAL_RT Technologies, IEEE 9 Bus System Example, Canada.

6. J. Guo, M. L. Crow, Jagannathan Sarangapani, An Improved UPFC Control for Oscillation Damping, IEEE Transactions On Power Sys- tems, Vol. 24, pp. 288-296, No. 1, February 2009.

7. Krishnagandhi. P, Power oscillation damping of two machine system, 2014 IEEE 8th Proceedings International Conference on Intelligent Sys- tems and Control (ISCO), 2014, Coimbatore, India.

8. G. Shahgholian, M. Mahdavian, Analysis and Simulation of UPFC in Electrical Power System for Power Flow Control, 2017 14th Interna- tional Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON), 27-30 June 2017, Phuket, Thailand.

9. K.R. Padiyar, A.M. Kulkarni, Control Design and Simulation of Uni- fied Power Flow Controller, IEEE Transactions on Power Delivery, pp. 1348-1354 Vol. 13, No. 4, October 1998, India.

10. J. Steffy Amirtham, V. Uma Optimal Location of Unified Power Flow Controller Enhancing System Security, 2016 Second International Conference on Science Technology Engineering and Management (ICONSTEM), 30-31 March 2016, Chennai, India.

11. S. N. Singh, Simulation and Analysis of UPFC using Simulink, Na- tional Power System Conference 2004, IIT Madras, India.

12. S. N. Singh, I. Erlich, Locating Unified Power Flow Controller for En- hancing Power System Loadability, 2005 International Conference on Future Power Systems, 18-18 Nov. 2005, Amsterdam, Netherlands.

13. Krishnagandhi. P, Jeevanandham A, Power Oscillation Damping of Two Machine System, 2014 IEEE 8th International Conference on In- telligent Systems and Control (ISCO), 10-11 Jan. 2014, Coimbatore, In- dia.

14. A. M. Vural, M. Tumay, Steady State Analysis of Unified Power Flow Controller: Mathematical Modelling and Simulation Studies, 2003 IEEE Bologna Power Tech Conference Proceedings, 14 June 2004, Bo- logna, Italy.

15. T G Prem Kumar, Analysis of Transient Stability Using UPFC for Symmetrical Faults, 2017 International Conference on Advances in Electrical Technology for Green Energy (ICAETGT), 19 April 2018, Coimbatore, India.

16. Dr A. Jeevanandham, Damping out System Oscillations in Power Sys- tem Using UPFC for Various Faults, IEEE International Conference On Advances in Electrical Technology for Green Energy 2017 (ICAETGT-2k17), 23-23 Sept. 2017, Coimbatore, India.

17. Sobuj Kumar Ray, Tuning of PI and PID Controller with STATCOM, SSSC and UPFC for Minimizing Damping of Oscillation, IOSR Journal of Electrical and Electronics Engineering (IOSR-JEEE), Re- search Gate, Jan. Feb. 2017.