Design and Implementation of Efficient Flash ADC

Design and Implementation of Efficient Flash ADC

M. Pavan Kumar

Electronics and Communication Engineering, Raghu Institute of Technology, Vishakhapatnam, India

K. Venkatesh

Electronics and Communication Engineering, Raghu Institute of Technology, Vishakhapatnam, India

S. Ravi Teja

P. Venkatesh

Electronics and Communication Engineering, Raghu Institute of Technology, Vishakhapatnam, India

1. Chanakya

   Electronics and Communication Engineering, Raghu Institute of Technology, Vishakhapatnam, India

   Electronics and Communication Engineering, Raghu Institute of Technology, Vishakhapatnam, India

   Abstract In wireless communication system signal converters like analog to digital and digital to analog plays very important role. It is very typical task to achieve low power, less area occupancy, error free converters. This paper presents the design of Analog to Digital converter with less operated voltage and less power consumption. basic modules to design ADC are comparators and encoders. For conventional n-bit ADC device requires 2n comparators along with encoder. We have designed different optimization comparators and decoders to make efficient ADC device and compare the basic parameters like transistor count, average power consumption, operating frequency and operating voltage.

   We design Flash type ADC with less transistors, less power consumption comparator along with encoder by using Tanner EDA analog environment 180nm technology node with moderate resolution.

   Keywords Analog to Digital converters, Digital to Analog converters, Low power, Comparator, Encoder, Operating frequency, Resolution.

   1. INTRODUCTION

      In wireless communication world entire signals are analogues. But we are surrounded by Digital devices. Everything in the universe measures all signals with analog only. But, how analog parameters are in digital devices?. Most of the applications are in digital signal processors only. Like microcontrollers, microprocessors. Analog to Digital converters are the mixed sigAnals of both analog and digital for processing the information or data. Present days most of the electronic applications are in digital only. Because of digital have finite set of occurrences. And also important factor is low power consumption, low operating voltage with a high speed data transmission. So we focus on efficient analog to digital converter.

      We have different types of analog to digital converters like Successive Approximation (SAR), Dual slope ADC, Sigma delta ADC and Flash ADC. Among those most cases we prefer only flash ADC. Because of its better tradeoff between its all performance metrics.[1]

      Some of the basic factors which depend on the performance of ADC are input signal bandwidth, resolution, quantization error, SNR, differential non linearity and integration non linearity. But resolution always inversely proportional to conversion rate of the device.

   2. FLASH ADC

      Among the different types of ADCs flash ADC have its more advantages. The main important factor of ADC is high conversion speed. It compares analog input along with reference threshold voltage and identifies which the value is closest through encoder and converts into digital. Basic block diagram of flash ADC shows below.

      Fig. 3.2 depicts The schematic

      Fig.1 Basic Block diagram of conventional ADC[1]

      In conventional type of ADC have resistor ladder, comparator and encoder modules. Among those key component is comparator. Because when n bits conversion requires 2N-1 comparators are required. So that overall performance depends on the comparator module. And also it

      have an impact on overall power consumption. only the comparator module operates at a high operating voltage.

      When we want to design a comparator, we must have a minimum three architectures. First one is an amplifier must have high gain and single ended output, second one type of latches used in comparators. And third one is hold the input circuit and track it. Majorly it requires more gain. For MOS structure it is impossible to get high gain, so we used more number of stages.

      1. Comparaots & Encoders:

         The comparator is an electronic circuit which is used to compares two input signals. In an ADC one analog signal with another analog signal or a reference signal and produces binary signal as the output based on the comparison. Basic comparator circuit shows as below.

         Fig.2 Basic comparator module [1]

         We verified existing comparators like open loop comparators, TIQ comparators, two stage CMOS comparator and Fine level comparator. Among those Threshold inverter quantized comparator has better power consumption and less operating frequency so we consider Threshold inverter quantized as a comparator. And we verified two different types of encoders named as 3 bit encoder with bubble remover circuit and Thermometer to binary code encoder. Among these two thermometer to binary code encoder circuit have less number of transistors with very less voltage supply about 1.5v and less power consumption.

      2. Simulation of different types of comparators:

         In this section, we simulate existing comparators by using Tanner EDA 15.1 analog environment. And compare all the comparators.

         Fig.3 Schematic circuit of Open loop comparator

         Fig 4 Schematic circuit of two stage CMOS amplifier comparator

         Fig 5 Schematic circuit of Fine level comparator

         Fig. 6 Schematic circuit of Threshold inverter quantized comparator

         S.No		Type of comparator	Comparat or transistor count	Supply voltage		Avg. power consumpti on	Operating frequency
         .	1	Fine level comparator	12	1v		0.34W	10Mhz
         .	2	Two stage CMOS COMPARA TOR	8	v	1.8	0.52W	20Mhz
         .	3	Open loop comparator	7	1v		0.23W	25Mhz
         .	4	TIQ comparator	4	v	0.6	0.16W	1Mhz

         S.No		Type of comparator	Comparat or transistor count	Supply voltage		Avg. power consumpti on	Operating frequency
         .	1	Fine level comparator	12	1v		0.34W	10Mhz
         .	2	Two stage CMOS COMPARA TOR	8	v	1.8	0.52W	20Mhz
         .	3	Open loop comparator	7	1v		0.23W	25Mhz
         .	4	TIQ comparator	4	v	0.6	0.16W	1Mhz

         Table 1: Comparison of all types of comparators

      3. Simulation of two types of encoders:

      In this section, we simulate two types of encoders by using Tanner EDA 15.1 analg environment. And compare these two encoders.

      Fig. 7 Schematic of 3bit encoder with bubble removal circuit

      Fig. 8 Schematic of thermometer code to binary code encoder

      Table 2: Comparison of two types of encoders

      Fig. 9 Test bench circuit for all the mixed modules in ADC

      Fig. 10 Final core flash ADC circuit

      SNo	Type of Encoder	Encoder transisto r count	Suppl y voltag e	Avg. power consumpti on	Operating frequency
      1.	3 bit encoder with bubble remover circuit	138	2v	1.65mW	5Mhz
      2.	Thermo meter to binary code encoder	76	1.5v	0.283mW	5Mhz

   3. PROPOSED FLASH ANALOG TO DIGITAL CONVERTER:

In this section we assemble resistor ladder circuit along with Threshold inverter quantized comparators and Thermometer code to binary code encoder circuit to form a final Analog to Digital circuit. We create individual circuit as a module and make test bench for each module. Finally we have test bench ADC circuit and final ADC core circuit.

Fig 12. Final core ADC module

CONCLUSION

As we designed entire ADC core by using 1.5V for encoder circuit and 0.6V for comparator circuit along with resistor ladder. Total core operating voltage is 2.1V i.e. very lesser voltage than compared to previous existing models. And also we verified entire ADC core power consumption that is very less in the form of micro watts.

REFERENCES

1. Neha, Amana yadav, Design and implementation of low power 3 bit flash ADC using 180nm technology, International journal of engineering research and applications, volume 6, june 2016.

2. Ashul pathak, shyam akashe. An efficient 3bit flash Analog to digital converter usimg 45nm technology, ICTCS14, rajasthan, nov 14-16 2014.

3. Andrew selasi agbemenu, ernest ofosu addo, A 3-bit 10-mbps low power CMOS flash ADC, communication of applied electronics

   (CAE), foundation of computer science FCS, newyork, USA, volume 7, 22 nov 2018.

4. Nidhi, N., Kumari, M., Prasad, D. Design of low power 3 bit CMOS flash ADC for aerospace applications, Proceedings of the Third International Conference on Microelectronics Computing and Communication Systems, Springer nature singapore pte ltd 2019.

5. Sk. Firojuddin, Soumen Pal and Puspak pain, Design and Comparative Analysis of Low-Power, High-Speed, 3-Bit Flash ADC for Biomedical Signal Processing Using 45-nm CMOS Technology, Computational Advancement in Communication Circuits and Systems, Lecture Notes in Electrical Engineering 575, Springer Nature Singapore Pte Ltd. 2020.