Cascaded H-Bridge 11-level Multilevel Inverter

Cascaded H-Bridge 11-level Multilevel Inverter

Mr. Mohd. Sami1 , Prof. M. A. Mallick2

Student, Integral University Lucknow India

. Professor, Dept. of Electrical Engineering, Integral University Lucknow India

Abstract:- This paper basically focusses on the design and implementation of a topology for a three phase eleven level cascaded H-bridge multilevel inverter by employing different kinds of switching methods. The basic purpose of this work is to increase the number of voltage level at the output withreduction of complexity to power circuit. The main advantages of this proposed topology is to reduce the Total Harmonic Distortion and minimise electromagnetic interface EMI generation and high voltage with very nearly to sine waveform. In this work, several kinds of carrier pulse width modulation techniques are proposed as which reduced the total harmonic distortion and improve the out voltage from the proposed topology and POD modulation techniques reduce the Total Harmonic Distortion. A number of H-bridge arranged in cascade form to increase the voltage level with the different switching schemes It is observed that this new topology can be recommended to three phase eleven level cascaded H-bridge inverter for getting optimum performance over the conventional methods. This performance in optimized in the eleven level of inverter. Improving the fundamental waveforms and reducing the total harmonic distortion is achieved by Utilizing 60 IGBTs and switching is arranged by a topology in cascaded form. The simulation model is produced by MATLAB 2018 software version.

Key Words: Cascaded H-bridge multilevel inverter, total harmonic distortion THD, Electromagnetic Interface,different phase pulse width modulation,

1. INTRODUCTION:

   The present status of global electricity demand is rapidly growing which caused the depletion of conventional energy resources like coal, oil, natural gas, etc. While the worldwide concern is how to fulfill the future electricity demand by using sustainable and reliable energy sources like non-conventional or renewable energy resources (RES). So the researchers are mainly focussing on that power generation source which is based on conventional energy resources. Solar photovoltaic and windmill energy are the two main types of conventional energy resources that take part in power generation [1-3]. Solar energy has some advantages over wind energy in terms of installation cost, maintenance, and availability. The output nature of Renewable Energy Sources is DC voltage and mainly they are intermittent which results in inherently unstable Output, which results in the reduction of stability and quality of power which can be improved by applying multi-level inverters (MLI) at the output of Renewable Energy Resources [4,5]. The idea of the multi-level inverter was given by Baker and Bannister in beginning of 1975,According to which it generates stepped waveform by using either single or multiple voltage sources as it has ability to give an effective interface with Renewable Energy Resources [6].

   The attractive features of multi-level inverters are output waveform with less THD, smaller common-mode voltage, low dv/dt, less electromagnetic interference, reduction of requirement of passive filter, and low switching loss. Multilevel Inverter operates at both fundamental and high- frequency pulse width modulation but the common drawback is, it requires a more number of switches followed by their driving circuits which makes it complex and costly [7-9]. The controlling and modulation of multi- level inverters becomes difficult with development inmulti- level inverters topologies. The stepped waveform produced by multi-level inverters having some lower-order harmonics, which results in fluctuations in voltage, increases in losses, and effect the quality of power. With proper controlling and modulation techniques, the above mentioned issue can be reduced [10]. There are two basic control schemes high-frequency switching scheme and low-frequency switching scheme in which low frequency have ability to give better control [11]. Selective harmonic elimination schemes are Low Switching frequency schemes.Sinusoidal pulse width modulation, and space vector pulse width modulation are the high-frequency switching techniques[12].

   While Reduced Switched Multi-level Inverters generates a great number of step levels with less numbers of switches is much needed in the present circumstances.

2. CONCEPT OF MULTI-LEVEL INVERTERS AND STAIRCASE WAVEFORM

   Inverters aredistributed into the four main categories based on output waveform which are the square wave, quasi wave, two levels pulse width modulation inverter, and multi-level inverters [13].

   Multi-level inverter gets more existence in recent decades both in the industrial and research area. The concept of multi-level inverters is based on producing a stepped voltage waveform at the output which is close to sinusoidal waveform by applying power semiconductor switches with

   1. voltage sources [14]. In multi-level inverters for generating a stepped waveform closer to a sinusoidal waveform, a proper driving circuit and isolated or non- isolated DC sources are employed for controlling power semiconductors devices. To approach the sinusoidal waveform without an expensive passive filter and bulky transformer number of step levels at the output should be increased [15-16]

      The benefit due to which multi-level inverters get attention is according to the literature [17-20].

      • The staircase waveform produces lower harmonic and smaller dv/dt which results in minimization of bulky filters.

      • The lesser common-mode voltage thus motor bearing stress get reduces.

      • Electromagnetic interference is lower.

      • Multi-level inverters draw low distortion current.

      • If the asymmetrical sources are used then more levels can be generated with the equal number of switches, practically it can be possible by using different RES like solar photovoltaic, wind, fuel, cell, etc.

3. CONVENTIONAL MULTI-LEVEL INVERTERS Traditionally, the Multi-Level Inverters can be classified, based on their circuit design into three types that are Neutral Point Clamped MLI, Capacitor Clamped MLI, and Cascaded H-Bridge MLI. The Cascaded H-Bridge MLI is mostly used because of its flexibility and redundancy. The modified structure of the Cascaded H-bridge inverter makes it easily designed for any desired number of levels [21,22].

4. PROPOSED TOPOLOGY:

   This topology requires sixty semiconductor switches and fifteen isolated dc voltage sources Vdc shown in fig 1. Operation Of Three-Phase Eleven-Level Inverter arranged in Cascaded Manner Operation of the three-phase eleven- level inverter with CHB topology is easily explained with the help of figure.

   TheswitchesS1,S2,S6,S8,S10,S12,S14,S16,S18,S20,S21,S2 2,S26,,S28,S30,S32,S34,S36,S38,S40,S41,S42,S46,S48,S5

   0,S52,S54,S5 6,S58,S60 are made turned on the output voltage will be Vdc which is level 1. The output voltage will be +2Vdc (which is level 2)

   When

   Switches S1, S2, S5, S6, S10, S12, S14, S16, S18, S20, S21, S22, S25, 26, S30, S32, S34, S36, S38, S40, S41, S42, S45, S46, S50, S52, S54, S56, S58, S60are turned on.

   Similarly output voltage will become 5Vdc (which is level5). When switches S1, S2, S5, S6, S9, S10, S13, S14, S17, S18, S21, S22, S25, S26, S29, S30, S33, S34, S37, S38, S41, S42, S45, S46, S49, S50, S53, S54, S57 and S58.

   When

   Switches S2, S4, S6, S8, S10, S12, S14, S16, S18, S20, S22, S24, S26, S28, S28, S0, S32, S34, S36, S36, S38, S40, S42, S44, S46, S48, S50, S52, S54, S56, S58 and S60

   on the output voltage is zero (which is level 0). S3, S4, S7, S8, S11, S12, S15, S16, S19, S20, S23, S24, S27, S28, S31, S32, S35, S36,S39,S40,S43,S44,S47,S48,S51,S52,S55,S56,S59 and

   S60 turn negative half cycle can be produced across load. The voltage blocking capacity for every switch is Vdc [23]. The operation of this topology can also be easily understood by mode of operation of single-phase eleven- level inverter shown in figure 2. Each voltage source

   Vdc is required 100V. There are eleven sufficient switching modes in generating the multistep levels for a eleven-level inverter.

   Fig. 1. Cascaded H-Bridge 11 Level Inverter

   FFT analysis of a three phase 11 level inverter CHB shown below. Improving the fundamental waveforms and reducing the total harmonic distortion by using 60 IGBTs and switching is arranged by a topology in cascaded manners

   Figure 2:PWM Output Voltage and Harmonic Spectrum in 3 phase 11 level CHB Inverter.

   Figure .3: PWM output voltage and harmonic spectrum in three phase nine level CHB inverter (Modulation index1.2)

   Fig:4Output Waveform of 11-level CHB MLI

   (X-Axis:TimeY-Axis:The magnitude of voltage and number of input level)

   TABLE -1: NO. OF COMPONENTS:- The number of

   required components for eleven level inverter is Table BELOW:

   Inverter type	NPC	Flying Capacitor	Cascaded.	Proposed
   Main switches	2(N-1)	2(N-1)	2(N-1)	(N-1)+4
   Main diodes	2(N-1)	2(N-1)	2(N-1)	(N-1)+4
   Clamping diodes	2(N2) (N-1)	0	0	0
   DC bus Capacitor/Isolated supplies	(N-1)	(N-1)	3(N1)/2	(N-1)/2
   Flying capacitors	0	(N-1) (N- 2)/2	0	0
   Total numbers	(N1) (2N+1)	(N1) (N+8)/2	11/2 (N- 1)	(5N+11)/2

   TABLE 2: %THD comparision for different level and different Modulation Index

   MODULATION INDEX	PWM PERCENTAGE THD FOR 11- LEVEL	PWM PERCENTAGE THD FOR 9- LEVEL
   0.92	13.29	15.76
   .95	12.10	14.76
   .99	11.31	13.28
   1	9.54	12.73
   1.2	7.51	8.8

5. REDUCED SWITCH MULTI-LEVEL INVERTERS Conventional Multi level Inverter topologies have several advantages and numerous applications but they are suffering from a more number of switch counts and their driving circuits and proportionally it increases as the number of levels increased which makes it complicated and resulted ina reductionof the system reliability. So the researchers are mainly focused on how to minimize the no. of switches of Multi-level Inverter.By reducing the no. of switches, no. of diodes, no. of capacitors, and no. of voltage sources aRecently Developed RS MLIi.e, Reduced Switch Multilevel Invertercan optimizewhich results in the reduction of complexity, overall cost, and loss of the system.

6. MERITS:

   In recent years,multilevel inverters are attracting lot of attentions due to the increasing higher power quality requirements.

   It possesses the several features such as reduced harmonic distortion,near sinusoidal output voltage waveform an reduces dv/dt stress.

   The basic unit does not need any extra charge balancing control circuits and complicated commutation methods which counted as agreat merit.

   The Internal resistance of power diode and capacitor can damp the unequal voltage between capacitor and DC voltage source during the charging operation which results to introduce an effective power circuit.

7. Demerits:

   The main drawback of multilevel inverters is that the number of switches increases with the no. of levels.

   In early stages of multilevel Inverters,development of control circuitry for large number of power switches was a significant problem but continuos evolution of CPLD,DSP & FPGA Devices solved these problems.

   Other Demerit of this MLI is the requirement of multiple numbers of DC sources,mainly provided by capacitors.Balancing the voltage sources during operation under different load conditions is much challenging.

8. CONCLUSION

   The increase in requirement for electrical energy and the depletion of conventional resources makes the world's attraction towards the resources which are vast in nature and also efficient. So the researchers are focused on how to optimize and make the gadgets, equipment, and converting devices keeping in view factor of energy-efficient to achieve the present requirement of energy. A Multi-level Inverter is also a converting device on which a lot of researcheshas been done, By reducing the counts of the components and minimized THD content present in the output of the inverters resulting into much efficiency.Now various new topologies named as reduced switch multi- level inverters come into practical application. Further researches are in progress for optimizing and minimizing the no. of switches and making the RSMLI more and more efficient. Multilevel cascaded H bridge inverters of 9 levels and 11 levels have been simulated using MATLAB. The following conclusions can be resulted from the analysis. If number of level increases, the The Total Harmonic Distortion resulted into small value. Hence it results into elimination of the requirement of filters. Though, Total Harmonic Distortion decreases with increase in number of levels, Sometimes lower or Sometimes higher harmonic contents persist prevalent in each level. These harmonics will proved more dangerous in induction drives. Hence the future work may be focalized by applying closed loop control with suitable elimination of harmonics.6.2

9. REFERENCES

1. O. Ellabban, H. Abu-Rub, and F. Blaabjerg, Renewable energy resources: Current status, future prospects, and their enabling technology, Renew. Sustain. Energy Rev., vol. 39, pp. 748-764, Nov. 2014.

2. U. Akram, M. Khalid, and S. Shaiq, An innovative hybrid wind-solar and battery-supercapacitormicrogrid system- Development and optimization, IEEE Access, vol. 5, pp. 25897-25912, 2017.

3. K. Kumar, N. R. Babu, and K. R. Prabhu, Design and analysis of RBFN based single MPPT controller for hybrid solar and wind energy system, IEEE Access, vol. 5, pp. 15308-15317, 2017.

4. Shaahid SM. Review of research on autonomous wind farms and solar parks and their feasibility for commercial loads in hot regions. Renew Sustain Energy Rev 2011; 15:387787.

5. S. De, D. Banerjee, K. S. Kumar, K. Gopakumar, R. Ramchand, and C. Patel, Multilevel inverters for low-power application, IET Power Electron., vol. 4, no. 4, pp. 384-392, Apr. 2011.

6. Ahamad, I., Asim, M., Sarkar, P. R., & Khan, F. A. (2016). Comparison of conventional PFC boost converter and bridgeless PFC boost converter. Int J Innov Res Electr Electron Instrum Control Eng, 4(5)..

7. L. G. Franquelo, J. Rodriguez, J. I. Leon, S. Kouro, R. Portillo, and M. A. M. Prats, The age of multilevel converters arrives, IEEE Ind. Electron. Mag., vol. 2, no. 2, pp. 28-39, Jun. 2008.

8. J. Rodriguez et al., Multilevel converters: An enabling technology for high-power applications, Proc. IEEE, vol. 97, no. 11, pp. 1786-1817, Nov. 2009.

9. R. Agrawal, and S. Jain, Comparison of Reduced part count multilevel inverters (RPC-MLIS) for integration to the grid, Electrical Power and Energy System, vol. 84, pp. 214-224, 2017.

10. N. Sandeep and U. R. Yaragatti, A switched-capacitor-based multilevel inverter topology with reduced components, IEEE Trans. Power Electrons, vol. 33, no. 7, pp. 5538-5542, Jul. 2018.

11. N. V. Nho and M. J. Youn, Comprehensive study on space- vector-PWM and carrier-based-PWM correlation in multilevel inverters, IEE Proc.-Electric Power Appl., vol. 153, no. 1, pp. 149-158, Jan. 2006.

12. S. Daher, Analysis, design, and implementation of a high- efficiency multilevel converter for renewable energy systems: Kassel University Press, 2006.

13. L. G. Franquelo, J. Rodriguez, J. I. Leon, S. Kouro, R. Portillo, and M. A. Prats, "The age of multilevel converters arrives," Industrial Electronics Magazine, IEEE, vol. 2, pp. 28-39, 2008.

14. Kouro S, Malinowski M, Gopakumar K, Pou J, Franquelo LG, Bin Wu BW, Rodriguez J, Pérez MA, Leon JI. Recent advances and industrial applications of multilevel converters. IEEE Trans Ind Electron 2010;57(8):255380.

15. R. Agrawal, and S. Jain, Comparison of Reduced part count multilevel inverters (RPC-MLIS) for integration to the grid, Electrical Power and Energy System, vol. 84, pp. 214-224, 2017.

16. J. Rodríguez, S. Bernet, B. Wu, J. O. Pontt, and S. Kouro, "Multilevel voltage-source-converter topologies for industrial medium-voltage drives," Industrial Electronics, IEEE Transactions on, vol. 54, pp. 2930-2945, 2007.

17. J. Rodriguez, L. G. Franquelo, S. Kouro, J. I. Leon, R. C. Portillo, M. A. M. Prats, et al., "Multilevel converters: An enabling technology for high-power applications," Proceedings of the IEEE, vol. 97, pp. 1786-1817, 2009.

18. M. A. Parker, L. Ran, and S. J. Finney, "Distributed control of a fault-tolerant modular multilevel inverter for direct-drive wind turbine grid interfacing," Industrial Electronics, IEEE Transactions on, vol. 60, pp. 509-522, 2013.

19. C.-M. Young, N.-Y. Chu, L.-R. Chen, Y.-C. Hsiao, and C.-Z. Li, "A single-phase multilevel inverter with battery balancing," Industrial Electronics, IEEE Transactions on, vol. 60, pp. 1972-1978, 2013.

20. F. Khoucha, M. S. Lagoun, A. Kheloui, and M. E. H. Benbouzid, A Comparison of Symmetrical and Asymmetrical Three-Phase H-Bridge Multilevel Inverter for DTC Induction

    Motor Drives, IEEE Transactions on Energy Conversion, vol. 26, no. 1, pp. 64-72, 2011.

21. S. S. Lee, M. Sidorov, C. S. Lim, N. R. N. Idris, and Y. E. Heng, Hybrid cascaded multilevel inverter (HCMLI) with improved symmetrical 4-level submodule, IEEE Trans. Power Electron., vol. 33, no. 2, pp. 932-935, Feb. 2018.

22. Hemant Joshi, P. N. Tekwani and Amar HindujaKolorrol Multilevel Inverter For Induction Motor Drives Using RV Topology, IEEE Trans. Ind. 2010.

23. Asim M, Riyaz A, Tiwari S, Verma A (2018) Performance evaluation of fuzzy controller for boost converter with active PFC. J Intell Fuzzy Syst 35(5):51695175

24. Raghav, R., Raza, A., & Asim, M. (2015). Distributed Power Flow Controller-An Improvement Of Unified Power Flow Controller. Development, 2(5).

25. M. Shahabuddin, M. Asim and A. Sarwar, "Parameter Extraction of a Solar PV Cell Using Projectile Search Algorithm," 2020 International Conference on Advances in Computing, Communication & Materials (ICACCM), 2020, pp. 357-361, doi: 10.1109/ICACCM50413.2020.9213005.

26. Parveen H, Asim M, Ahamad I (2016) Efficiency analysis of bridgeless PFC boost converter. IntJ Sci Res Dev 4(01)

27. Asim, M., Mallick, M. A., Malik, A., & Saaqib, M. (2015). Modelling and simulation of 5 parameter model of solar cell. International Journal of Electronics, Electrical and Computational System, 4.

28. Tariq, M., Bakhsh, F. I., Khan, S. A., & Asim, M. (2010). Solar based space cooling system in buildinga case study of Maulana Azad library, AMU. Int J Recent Trends Eng Technol, 4(4).

29. Akhtar, I., Asim, M., Yadav, R. K., Agarwal, P., & Kirmani, S. (2019, August). Design of Effective Grid-Connected Solar System. In International Conference on Inventive Computation Technologies (pp. 606-614). Springer, Cham.

30. Khan, F. A., Saeed, S. H., Asim, M., Rahman, S., & Sarkar, P.

R. (2018, September). Cost Optimization by adding SPV Plant at Load end in a Grid Connected System. In 2018 International Conference on Computational and Characterization Techniques in Engineering & Sciences (CCTES) (pp. 65-70). IEEE.