Novel DC-DC Converter for PV System with High Voltage Gain

DOI : 10.17577/IJERTV2IS120969

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Novel DC-DC Converter for PV System with High Voltage Gain

T. Sripal Reddy

Head of EEE Department Sarada Institute of Technology & Science, raghunadapalem Khammam, A.P.

Dr. B V Sanker Ram

Prof. EEE Department Jawaharlal Nehru Technological University, Kukatpally Hyderabad, A.P

Dr. K. Raghu Ram

Principal

Laqshya Institute of Tech & Science, Tanikella Khammam, A.P.

Abstract

The future renewable electric energy delivery and management system provides an alternative for DC energy sources. The integration of large scale PV systems to the grid is a growing trend in modern power systems. This paper introduces a new family of dcdc converters based on the three-state switching cell and voltage multiplier cells. The analysis and design procedure includes the addition of a variable DC-DC Converter placed between the array and the load. It is suitable in cases where dc voltage step-up is demanded, such as electrical fork-lift, audio amplifiers, and many other applications The PV source with MPPT has been developed and the complete Simulink model of the proposed scheme has been built using MATLAB/SIMULINK.

Key words -High voltage gain, voltage multiplier cells (VMCs), PV systems, SSC.

I.INTRODUCTION

DEPENDING on the application nature, several types of static power converters are necessary for the adequate conversion and conditioning of the energy provided by primary sources such as photovoltaic arrays, wind turbines, and fuel cells. Besides, considering that the overall cost of renewable energy systems is high, the use of high-efficiency power electronic converters is a must [1]. The literature presents numerous examples for applications where dcdc step-up stages are necessary, e.g., audio amplifiers [2], uninterruptible power supplies (UPSs) [3], fuel cell powered systems [4], and fork lifts vehicles [5], although many other ones can be easily found. Typical solutions include the use of low- frequency or high-frequency power transformers to adjust the voltage gain properly. Besides, galvanic isolation may be necessary due to safety reasons [6].Unfortunately, this practice may

Bring increased size, weight, and volume if compared with nonisolated approaches such as the boost converter. The conventional boost converter can be advantageous for step-up applications that do not demand very high voltage gain, mainly due to the resulting low conduction loss and design simplicity [7]. Theoretically, the boost converter static gain tends to be infinite when duty cycle also tends to unity. However, in practical terms, such gain is limited by the I2R loss in the boost inductor due to its intrinsic resistance, leading to the necessity of accurate and high-cost drive circuitry for the active switch, mainly because great variations in the duty cycle will affect the output voltage directly [8]. Due to the importance of the conventional boost converter in obtaining distinct and improved topologies for voltage step-up applications, some techniques have been developed and modified with the aim of improving the characteristics of the original structure. Basically, two strategies are adopted for this purpose: voltage step-up with and without using extreme values of duty cycle. Some arrangements available in the literature will be discussed as follows.

Cascading one or more boost converters may be considered to obtain high voltage gain. Even though more than one power processing stage exists, the operation in continuous conduction mode (CCM) may still lead to high efficiency [9]. The main drawbacks in this case are increased complexity and the need for two sets that include active switches, magnetics, and controllers. Besides, the controllers must be synchronized and stability is of great concern [10]. Due to high power levels and high output voltage, the latter cascaded boost stage has severe reverse losses, with consequent low efficiency and high electromagnetic interference (EMI) levels. Typical examples of such topologies are the single-switch quadratic boost converter and the two-switch three- level boost converter [11]. Converters with magnetically coupled inductance such as flyback or the single-ended primary inductance converter (SEPIC) can easily achieve high voltage gain using switches with reduced on-resistance, even though efficiency is compromised by the losses due to the leakage inductance [12]. An active clamping circuit is

able to regenerate the leakage energy, at the cost of increased complexity and some loss in the auxiliary circuit [13]. A hybrid boostflyback converter is introduced in [14]. The efficiency of the conventional flyback structure is typically low due to the parasitic inductance. A possible solution lies in connecting the output of the boost converter to that of the flyback topology, with consequent increase of voltage gain due to the existent coupling between the arrangements. In this case, the boost convert behaves as an active clamping circuit when the main switch of the flyback stage is turned OFF. A boost converter using switched capacitors is proposed in [15], where high voltage gain can be obtained, but it is restricted to low-power applications. In this case, the dc output voltage can be increased as desired by adding a given number of capacitors. Low duty cycle is used, alleviating the problem of the boost diode reverse recovery. However, the high component count with distinct ratings is an inherent drawback.

As the power rating increases, it is often required to associate converters in series or in parallel. In high- power applications, interleaving of two boost converters is usually employed to improve performance and reduce size of magnetics. Besides, for high-current applications and voltage step-up, the currents through the switches become just fractions of the input current. Interleaving effectively doubles the switching frequency and also partially cancels the input and output ripples, as the size of the energy storage inductors and differential-mode E MI filter in interleaved implementations can be reduced [16]. The converter studied in [17] uses two boost topologies coupled through an autotransformer with unity turns ratio and opposite polarity so that the current is equally shared between the switches. Besides, voltage doubler characteristic is achieved. Even though the current stress through the switches is reduced, the respective voltage stress is less than or equal to half the total output voltage. Isolated drive circuitry must also be employed in this case. Other topologies using the interleaving technique are investigated in [18]. Voltage multiplier cells (VMCs) are adopted to provide high voltage gain and reduce voltage stress across the semiconductor elements. Interleaving allows the operation of the multiplier stages with reduction of the current stress through the devices. Besides, the size of input inductors and capacitors is drastically reduced. The voltage stress across the main switches is limited to half of the output voltage for a single multiplier stage. However, high component count is necessary, with the addition of a snubber circuit due to the sum of the reverse recovery currents through the multiplier diodes and consequent increase of conduction losses.

The converter described in [19] allows the increase of the static gain by cascading several VMCs that operate based on the resonance principle. It is also shown that the input inductance is the same as that of a conventional boost converter. Even though switching losses are minimized because there is zero-current switching (ZCS) turn-on of the main switch, conduction losses tend to increase due t the circulating reactive energy. The topology studied in

[20] uses a voltage doublers rectifier as the output stage of an interleaved boost converter with coupled inductors. High voltage gain can be obtained, although efficiency is affected by the use of an resistor- capacitor-diode (RCD) snubber. In the last few years, some converters based on the three state switching cells (3SSC) have been proposed, and will be discussed as follows. The 3SSC is obtained by the association of two two-state switching PWM cells (2SSCs) interconnected to a center tap autotransformer, from which a family of dcdc converters can be derived. This concept was first introduced in [21]. Some prominent advantages can be addressed to such structures, e.g., reduced size, weight, and volume of magnetics , which are designed for twice the switching frequency; the current stress through each main switch is equal to half of the total output current, allowing the use of switches with lower current rating; losses are distributed among the semiconductors, leading to better heat distribution and consequently more efficient use of the heat sinks; the drive circuit of the main switches becomes less complex because they are connected to the same reference node [22]. The topology investigated in [23] uses VMCs associated with the 3SSC, whose claimed advantages are the input current is continuous with low ripple; the input inductor is designed for twice the switching frequency, with consequent weight and volume reduction; the voltage stress across the switches is lower than half of the output voltage, and naturally clamped by one output filter capacitor. As a disadvantage, a small snubber is necessary for each switch and one additional winding per cell is required for the autotransformer [23]. The converter proposed in [24] presents high voltage gain, while the input current is continuous with reduced ripple. The input inductor is also designed for twice the switching frequency, implying reduction of weight and size. The voltage stress through the switches is less than half of the output voltage due to clamping performed by the output filter capacitor. It is also important to mention that, for a given duty cycle, the output voltage can be increased by adjusting the transformer turns ratio without affecting the voltage stress across the main switches.

Fig.1. (a) Voltage multiplier cell. (b) Three-state switching cell. (c) Resulting ce

Metal oxide semiconductor field-effect transistors (MOSFETs) with reduced on-resistance can be used to further minimize conduction losses. However, the converter cannot operate adequately when a duty cycle is lower than 0.5 due to magnetic induction issues. The hard commutation of switches and high component count are also possible drawbacks. An isolated converter, whose characteristics are similar to those of the pushpull converter, is introduced in [25].

The use of the 3SSC is associated with the following advantages: utilization of only one primary winding that allows the addition of a dc current blocking capacitor in series connection, in order to avoid the transformer saturation problem; less copper and reduced magnetic cores are involved during the transformer assembly; and the moderate leakage inductance of the transformer allows the reduction of overvoltage, and the commutation losses of the switches. The autotransformer of the 3SSC has small size, because it is designed for half of the output power and for a high magnetic flux density, Since the current through the windings is nearly continuous with low ripple [25]. This paper presents a topology for voltage step-up applications based on the use of multiplier cells constituted by diodes and capacitors. The converter is able to operate in overlapping mode (when a duty cycle D is higher than 0.5) and no overlapping mode (when a duty cycle D is lower than 0.5), analogously to other 3SSC-based structures [4], [7], [21][25]. However, the study carried out in this paper only considers the operation with D > 0.5. The generic structure, which is valid for any number of cells, is initially presented, while the analysis is focused on structures with three cells, aiming to determine the stress regarding the elements that constitute the aforementioned configurations. Simulation results regarding the structure with three multiplier cells are also presented and discussed to validate the proposal.

  1. PROPOSED TOPOLOGIES

    For good operation of the VMC shown in Fig. 1(a), ac input voltage is required, which is an important requirement of this cell. Due to this fact, the use of the 3SSC depicted in Fig. 1(b) is considered because it generates such ac voltage across the terminals of the autotransformer and the drain terminals of the controlled switches. For this reason, both cells are integrated leading to the proposed cell shown in Fig. 1(c).

    In the resulting cell, the controlled switches can be represented by MOSFETs, junction field-effect transistors, insulated gate bipolar transistors, bipolar junction transistors, etc. All the generated topologies present bidirectional characteristics. By using the proposed cell shown in Fig. 1(c), it is possible to generate the six novel nonisolated dcdc converters, i.e., buck, boost, buckboost, Cuk, SEPIC, and zeta, which are shown in Fig. 2.As was mentioned before, the use of high-voltage gain converters is of great interest, even though many approaches are based on isolated topologies [26][28].

    It is worth to notice that the use of non isolated converters particularly dedicated to applications regarding renewable power systems has been the scope of recent works [29][33]. The efforts leading to the development of such non isolated topologies are then well justified in the literature. In order to verify the claimed advantages of the converter family, the boost converter shown in Fig. 2(b) is chosen. The developed analysis considers the converter associated with three voltage multiplier cells and is detailed as follows. In order to better understand the operating principle of the structures, the following assumptions are made:

    1. The input voltage is lower than the output voltage;

    2. steady-state operation is considered;

    3. Semiconductors and magnetic are ideals;

    4. Switching frequency is constant;

    5. The turns ratio of the autotransformer is unity;

    6. The drive signals applied to the switches are 180 displaced.

    A. Operating Principle

    The configuration that uses three multiplier cells is represented in Fig. 3. The equivalent circuits that correspond to the converter operation and the relevant theoretical waveforms are presented in Figs. 4 and 5, respectively.

    First stage [t0, t1]:

    Switches S1 and S2 are turned ON, while all diodes are reverse biased. Energy is stored in inductor L and there is no energy transfer to the load. The output capacitor provides energy to the load. This stage finishes when switch S1 is turned OFF.

    Second stage [t1, t2]:

    Switch S1 is turned OFF; while S2 is still turned ON and diodeD5 is forward biased. There is no energy transfer to the load as well. Inductor L stores energy, capacitors C1 and C3 are discharged, and capacitors C2, C4, and C6 are charged.

    Third stage [t2, t3]:

    Switches S1 and S2 remain turned OFF and ON, respectively. DiodesD3 andD7 are forward Biased, while all the remaining ones are reverse biased. Energy is transferred to the output stage through D7 . The inductor stores energy and capacitors C2 and C4 are still charged. Capacitors C1 are discharged, and so are C3 and C5.

    Fourth stage [t3, t4]:

    Switch S2 remains turned ON, diode D3 is reverse biased, and diode D1 is forward biased. Energy is transferred to the load through D7. The inductor is discharged, and so are capacitors C1, C3, and C5, while C2 is charged.

    Fifth stage [t4, t5]:

    This stage is identical to the first one.

    Fig2. Main theoretical waveforms.

  2. MATLAB MODELING

    1. Fig. 3: Matlab/Simulink circuit of proposed system

      IV SIMULATION RESULTS

      Fig. 4: Input voltage Vs=55v

      Fig. 5: Output voltage and current Vout=405V, I load=5A

      Fig. 6: Transformer primary winding voltage and current

      Fig. 7: Vs1, Vs2, Is1

      V. CONCLUSION

      This paper has proposed generalized non isolated high gain voltage dcdc converters. To verify the principle operation of the generated structures, the boost converter was chosen. The topology is adequate for several applications such as fuel cell systems, and UPSs, where high voltage gain between the input and output voltages is demanded An important characteristic that can be seen in the experimental results is the reduced blocking voltages across the controlled switches compared to similar circuits, allowing the utilization of MOSFETs with reduced on-resistance. Besides, the advantages of the 3SSC are also incorporated into the resulting topology, e.g., the current is distributed among the semiconductors. Furthermore, only part of the energy from the input source flows through the active switches, while the remaining part is directly transferred to the load without being processed by these switches, i.e., this energy is delivered to the load through passive components, such as the diodes and the transformer windings. Then qualitative analysis, theoretical analysis, losses modeling, and simulation results have been discussed. The converter achieves about 95.3%

      efficiency at rated load if compared to similar configurations that were previously proposed in the literature. It is also expected that non isolated converters based on the 3SSC and VMC may be competitive solutions for high-current-high-voltage- step-up applications if compared with some other isolated approaches.

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