A DC/DC Converter with High Voltage Gain Using Soft-Switching Technique

A DC/DC Converter with High Voltage Gain Using Soft-Switching Technique

A DC/DC Converter with High Voltage Gain Using Soft-Switching Technique

B.Srujana, D.Kumaraswamy, D.R.K Paramahamsa

AbstractA soft-switching dc/dc converter with high voltage gain is proposed in this paper. It provides a continuous input current and high voltage gain. Moreover, soft-switching characteristic of the proposed converter reduces switching loss of active power switches and raises the conversion efficiency. The reverse-recovery problem of output rectifiers is also alleviated by controlling the current changing rates of diodes with the use of the leakage inductance of a coupled inductor. The paper can be extended with some features like ZVS technique to reduce losses even more.A zero-voltage-switching (ZVS) dcdc converter with high voltage gain can be presented. It consists of a ZVS boost converter stage and a ZVS half- bridge converter stage and two stages are merged into a single stage. The ZVS boost converter stage provides a continuous input current and ZVS operation of the power switches. The ZVS half-bridge converter stage provides a high voltage gain.

Index TermsBoost converter, high voltage gain, soft switching.

1. INTRODUCTION

   ECENTLY, the demand for dc/dc converters with high voltage gain has increased. The energy shortage and the atmosphere pollution have led to more researches on the renewable and green energy sources such as the solar arrays and the fuel cells [1][5]. Moreover, the power systems based on battery sources and super capacitors have been increased. Unfortunately, the output voltages of these sources are relatively low. Therefore, the step-up power conversion is required in these systems [6], [7]. Besides the step- up function, the demands such as low current ripple, high efficiency, fast dynamics, light weight, and high power density have also increased for various applications. Input current ripple is an important factor in a high step-up dc/dc converter [8], [9]. Especially in the fuel cell systems, reducing the input current ripple is very important because the large current ripple shortens fuel cells lifetime as well as decreases performances [10][14]. Therefore, current-fed converters are commonly used due to their ability to reduce the current ripple [15].

   In applications that require a voltage step-up function and a continuous input current, a continuous- conduction-mode (CCM) boost converter is often used due to its advantages such as continuous input current and simple structure. However, it has a limited voltage gain due to its parasitic components. Moreover the

   reverse-recovery problem of the output diode degrades the systems performances. At the moment when the switch turns on, the reverse-recovery phenomenon of the output diode of the boost converter is provoked. The switch is submitted to a high current change rate and a high peak of reverse-recovery current. The parasitic inductance that exists in the current loop causes a ringing of the parasitic voltage, and then, it increases

   Fig. 1. Circuit diagram of the proposed dc/dc converter.

   the voltage stresses of the switch and the output diode. These effects significantly contribute to increase switching losses and electromagnetic interference. The reverse-recovery problem of the output diodes is another important factor in dc/dc converters with high voltage gain [16], [17]. In order to overcome these problems, various topologies have been introduced. In order to extend the voltage gain, the boost converters with coupled inductors are proposed in [18] and [19]. Their voltage gains are extended, but they lose a continuous input current characteristic and the efficiency is degraded due to hard switching of power switches. For a continuous input current, current-fed step-up converters are proposed in [20] and [21]. They provide high voltage gain and galvanic isolation. However, the additional snubbers are required to reduce the voltage stresses of switches. In order to

   increase the efficiency and power conversion density, a soft-switching technique is required in dc/dc converters [22][27].

   A soft-switching dc/dc converter with high voltage gain, which is shown in Fig. 1, is proposed. A CCM boost cell provides a continuous input current. To increase the voltage gain, the output of the coupled inductor cell is laid on the top of the output of the CCM boost cell. Therefore, the high voltage gain is obtained without high turn ratio of the coupled inductor, and the voltage stresses of the switches are confined to the output voltage of the CCM boost cell. A zero-voltage- switching (ZVS) operation of the power switches reduces the switching loss during the switching transition and improves the overall efficiency.

2. ANALYSIS OF THE PROPOSED CONVERTER

   Fig. 1 shows the circuit diagram of the proposed soft switching dc/dc converter with high voltage gain. Its key waveforms are shown in Fig. 2. The switches S1 and S2 are operated asymmetrically and the duty ratio D is based on the switch S1. D1 and D2 are intrinsic body diodes of S1 and S2. Capacitors C1 and C2 are the parasitic output capacitances of S1 and S2. The proposed converter contains a CCM boost cell. It consists of LB, S1, S2, Co1 and Co2. The CCM boost cell provides a continuous input current. When the switch S1 is turned on, the boost inductor current iLB increases linearly from its minimum value ILB2 to its maximum value ILB1. When the switch S1 is turned off and the switch S2 is turned on, the current iLB decreases linearly from ILB1 to ILB2. Therefore, the output capacitor voltages Vo1 and Vo2 can be derived easily as

   Vo1 = Vin (1)

   D

   Vo2 =

   1 D

   Vin

   (2)

   To obtain ZVS of S1 and S2 and high voltage gain, a coupled inductor Lc is inserted. The coupled inductor Lc is modelled as the magnetizing inductance Lm, the leakage inductance Lk , and the ideal transformer that has a turn ratio of 1:n (n = N2/N1 ). The voltage doubler consists of diodes D1, D2 and the output capacitors Co3, Co4 , and the secondary winding N2 of the coupled inductor Lc is on the top of the output stage of the boost cell to increase voltage gain. The coupled inductor current iL varies from its minimum value IL1 to its maximum value IL2. The operation of the proposed converter in one switching period Ts can be divided into six modes. Fig. 3 shows the operating modes. Before t0, the switch S2 and diode D4 are conducting.

   Mode 1 [t0, t1]: At t0 , the switch S2 is turned off. Then, the boost inductor current iLB and the coupled inductor current iL start to charge C2 and discharge C1 . Therefore, the voltage vS1 across S1 starts to fall and the voltage vS2 across S2 starts to rise. The transition interval Tt1 of switches can be considered as

   C1 C2Vin

   Tt1 =

   (1- D) (IL1 . ILB2 )

   (3)

   Fig. 2. Key waveforms of the proposed converter.

   Since the output capacitances C1 and C2 of the switches are very small, the transition interval Tt1 is very short and it can be neglected. Therefore, the inductor currents iLB and iL can be considered to have constant values during mode 1.

   Mode 2 [t1, t2 ]: At t1 , the voltage vS1 across the

   i t i Vin t t

   (4)

   lower switch S1 becomes zero and the lower diode D1 is

   m m1 1

   m

   L

   L

   turned on. Then, the gate signal is applied to the switch

   i t I

   • V 04 nVin t t

     (5)

     S1 . Since the current has already flown through the

     2 D 4 1

     Lk

     lower diode D1 and the voltage vS1 becomes zerobefore

     i t ni t nI

   • n V 04 nVin t t

     (6)

     the switch S1 is turned on, zero-voltage turn-ON of S1 is achieved. Since the voltage across the boost inductor

     1 2

     D 4

     Lk

     1

   • Vin

     LB is Vin, the boost inductor current increases linearly

     from ILB2. Since v1 is Vin and vk is Vo4 + nVin , the

     iL t

     im t

     i1 t

     im1

     nID4

     t t1

     Lm

     magnetizing current im, the primary current i1 , the secondary current i2 , and the inductor current iL are given by

   • n V 04 nVin t t1

   Lk

   (7)

   Fig. 3. Operating modes.

   Mode 3 [t2, t3 ]: At t2 , the secondary current i2 changes its direction. The diode current iD4 decreases to zero and the diode D4 is turned off. Then, diode D3 is turned on and its current increases linearly. Since the current changing rate

   of D4 is controlled by the leakage inductance of the coupled inductor, its reverse-recovery problem is alleviated. Since v1 is Vin and vk is nVin Vo4 , the current im, the primary

   current i1, the secondary current i2 , and the inductor current

   iL are given by

   diode D3 is turned off. The reverse-recovery problem of D3 is also alleviated due to the leakage inductance of Lc .

   i t i

   t

   Vin t t

   (8)

   Then, the diode D4 is turned on and its current increases

   m

   m 2 2

   m

   linearly. Since v1 is DVin/(1 D) and vk is Vo4 nDVin/(1

   L

   L

   i t nVin V 03 t t

   (9)

   D), the current im, the primary current i1 , the secondary

   k

   k

   2 L 2 current i2 , and the inductor current iL are given by

   i1t ni2t n nVin V 03 t t 2

   Lk

   (10)

   i t i

   t

   DVin

   t t

   (17)

   m

   m

   m m 5 L 1 D 5

   iLt imt i1t

   i2t D /1 DnVin V 04 t t5

   (18)

   Vin

   nVin V 03 Lk

   im t 2 t t 2 n t t 2

   Lm Lk

   D /1 DnVin V 04

   i1t ni2t= n

   t t5 (19)

   (11)

   Mode 4 [t3, t4]: At t3 , the lower switch S1 is turned off. Then, the boost inductor current iLB and the coupled

   iLt imt5

   DV

   Lk

   V D /1 DnV

   inductor current iL start to charge C1 and discharge C2.

   • in

   • nn 03

   in t t5

   Therefore, the voltages vS1 and vS2 start to rise and fall in a manner similar to that in mode 1. The transition interval

   Tt2 of switches can be considered as

   Lm1 D k

   L

   L

   C1 C2Vin

   The average values of vLB and v1, Vo1 can be considered to

   L2

   L2

   LB1

   LB1

   Tt 2 1 DI I

   (12)

   be Vin. Referring to the voltage waveforms vLB in Fig. 2, the

   Tt2 is also negligible. Therefore, the inductor currents iLB

   and iL can be considered to have constant values during Tt2

   .

   Mode 5 [t4, t5 ]: At t4 , the voltage vS2 across the upper switch S2 becomes zero and the diode D2 is turned on. Then, the gate signal is applied to the switch S2. Since the

   current has already flown through the diode D2 and the

   voltsecond balance law gives

   VinDTs (Vo1 + Vo2 Vin) (1 D)Ts = 0. (21)

   From modes 3 and 5, the current ID3 can be written as follows:

   ID3 nVin V 03 D 1Ts

   Lk

   voltage vS2 becomes zero before the switch S2 is turned on, zero-voltage turn-ON of S2 is achieved. Since the voltage

   V 03 D1

   • DnVin

     T

     across the boost inductor LB is (Vin/(1 D) Vin ), the boost inductor current decreases linearly from ILB1 . Since

     (22)

     = 2 s

     Lk

     v1 is DVin/(1 D) and vk is Vo3 nDVin/(1 D), the

     magnetizing current im, the primary current i1, the secondary current i2 , and the inductor current iL

     from where, the output voltage Vo3 can be obtained by

     D D /1 D

     are given by

     DVin

     V 03

     1

     D 1 2

     2 nVin

     (23)

     Lm 1

     Lm 1

     D

     D

     im t im2 t t4

     V 03 D /1 DnVin

     (14)

     (13)

     From modes 2 and 6, the current ID4 can be written as follows:

     i2 t

     ID3

     Lk

     t t 4

     I nVin V 04 T

     i1t ni2t

     V 03 D /1 DnVin

     D4 1 s

     Lk

     =n ID3 n

     k

     k

     L

     t t4

     (15)

     V 04 D /1 DnVin

     =

     =

     1 D 2 Ts

     1 D 2 Ts

     (24)

     (24)

     i t i ni

     Lk

     L m2 D3

     DVin V 03 D /1 DnVin

     from where, the output voltage Vo4 can be obtained by

     nn t t4

     L

     L

     Lm1 D

     k

     (20)

     V 04

     D 1 D /1 D

     2 nVin (25)

     Mode 6 [t5, t6 ]: At t5 , the secondary current i2 changes its direction. The diode current iD3 decreases to zero and the

     1 D 1 2

     Since the average value of the current i2 is zero, the following relation can be obtained:

     (D 1 +2) ID3 = (1 D+1 2) ID4. (26)

     From (22), (24), (25), and (26), the relation between 1 and 2 is obtained by

     Im2 + nID3 + ILB1 > 0 (36)

     from where, it can be seen that the ZVS of S2 is easily obtained. For ZVS of S1 , the following condition should be satisfied:

     Im1 + nID4 > ILB2. (37)

     On the assumption that is small, ID4 and ILB2 can be

     1

     2

     D

     1 D

     (27)

     simplified as follows:

     Since the average value of the current im is zero, its peak values Im1 and Im2 have the following values:

     DVinTs

     ID 4

     2I

     (38)

     1 D

     Im1 = Im2 =

     2Lm

     (28)

     ILB2

     n 1I

   • ILB

   (39)

   The output current Io in Fig. 1 can be represented by

   1 D 2

   Io = (D 1 +2)

   ID3

   2

   = (1 D+1 2 )

   ID 4

   .(29)

   2

   From (38) and (39), the inequality (37) can be rewritten by

   From (22), (27), and (29), 1 and 2 are obtained by

   Im 1 2nI ILB n 1I ILB

   (40)

   1 = D (30)

   2 = (1 D) (31)

   1 D 2

   1 D 2

   where

   1

   1

   = 1

   1 8LkI 0

   Since Im1, Io , and DILB are all positive values, the inequality (40) is always satisfied for n>1. From (36) and (40), it can be seen that ZVS conditions for S1 and S2 are

   2 nDVinTs

3. CHARACTERISTIC AND DESIGN PARAMETERS

1. Input Current Ripple

   The input current ripple ILB can be written as

   DVinTs

   always satisfied. Moreover, dead times of two switches S1 and S2 should be considered. The gate signal should be applied to the switch before the current that flows through the anti parallel diode changes its direction. Namely, the leakage inductance Lk should be large enough for the current to maintain its direction during dead times of two switches, S1 and S2 . This condition can determine the

   minimum value of the leakage inductance. From (30), the

   ILB = ILB1 ILB2 =

   . (32)

   LB

   leakage inductance Lk should satisfy the following

   the inductor LB should satisfy the following condition:

   the inductor LB should satisfy the following condition:

   *

   *

   Lk nVinDTs 1

   Lk nVinDTs 1

   21* 2

   21* 2

   To reduce the input current ripple ILB below a specific value I c,ondition:

   LB >

   DVinTs I *

   (3)

   8I

   1 D

   (41)

2. Voltage Gain

   From (1), (2), (23), (25), (27), (30), and (31), the voltage gain of the proposed converter is obtained by

   V 1 nD1

   Where 1 is a predetermined minimum value of1. The

   leakage inductance of the coupled inductor also alleviates the reverse recovery problem of output diode. Large leakage inductance can remove the reverse-recovery problem but it reduces the voltage gain as shown in Fig.

   Vin

   (34)

   1 D

   D 2D 11 D 2D 1

   4(b).

   1. Future Scope of Work

      V Vin

3. ZVS Condition

1 n

1 D

(35)

AZVS dcdc converter with high voltage gain can be suggested. It can achieve ZVS turn-ON of two power switches while maintaining CCM. In addition, the reverse- recovery characteristics of the output diodes were significantly improved by controlling the current changing rate with the use of the leakage inductance of the

The ZVS condition for S2 is given by

transformer. The ZVS converter presents a higher efficiency and a wider ZVS region compared to other soft-switching converters due to the ZVS boost converter stage.

Simulink Model

Simulink Results

1. Simulation Results

   input current can be controlled by using the inductance of the CCM boost cell. Soft switching of power switches and the alleviated reverse-recovery problem of the output rectifiers improve the overall efficiency.

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   Authors

   B.Srujana is a P.G Scholar at Auroras Research and Technological Institute, Warangal. Her areas of interest include High Voltage, Power Electronics and DC/DC converters.

2. CONCLUSION

A soft-switching dc/dc converter with high voltage gain has been proposed in this paper. The proposed converter can minimize the voltage stresses of the switching devices and lower the turn ratio of the coupled inductor. It provides a continuous input current, and the ripple components of the

D.Kumaraswamy is working as Associate Professor and Head in EEE department at ARTI, Warangal. His areas of research include Power Electronics and Resonant Converters.

D.R.K Paramahamsa is working as Associate Professor in EEE department at ARTI, Warangal. His areas of research include Power Systems and Control Systems.