Comparison of Vedic Multipliers With Conventional Hierarchical Array of Multipliers

Comparison of Vedic Multipliers With Conventional Hierarchical Array of Multipliers

Basavaraj.B

Deportment of Mathematics

Govt. first grade college naregal-582119 Dist: Gadag (Karnataka), India

Abstract

Digital signal processing (DSP) is the technology that is omni present in almost every engineering discipline. It is fastest growing technology in this current century. Faster addition and multiplication is the core computing process of most DSP algorithms so there is need of high speed multipliers. This paper gives information of UrdhvaTiryakbhyammultiplication based on Vedic algorithms and comparison of Vedic multipliers with conventional hierarchical array of multipliers.

Key words-UrdhvaTiryakbhyam, hierarchical array multipliers (HAOM)

Introduction

The multiplier is a basic building block in Standard Digital Signal Processors (DSP). Most of the DSP tasks require real-time processing with several multiplications. Multiplication is most important arithmetic operation having wide applications from normal multiplication in DSP. Multiplication process is used in many applications like instrumentation and measurement, communications, audio and video processing, animations, special effect, Graphics, image enhancement, Navigation, radar, GPS, and control applications like robotics, machine vision.Multiplication is the process of adding a number of partial products. Multiplication algorithms differ in terms of partial product generation and partial product addition to produce the final result [1]. Higher arithmetic operations are important to achieve the desired performance in many real time digital signal processing and image processing applications.

Vedic mathematics, a bequest given to the humankind by the ancient sages of India. It is the name given to the ancient system of mathematics, which was reconstructed from ancient Vedic texts of Atharva Veda early in the last century by Sri Bharati Krishna Tirthaji(Swami,1965). It is based on a set of 16 sutras (or aphorisms) dealing with

mathematics related to arithmetic, algebra, and geometry. These techniques and ideas can be directly applied to trigonometry, plain and spherical geometry,conics, calculus (both differential and integral),and applied mathematics of various kinds. The elegance of Vedic mathematics lies in the fact that it diminishes otherwise cumbersome looking calculations in conventional mathematics to a very easy ones (Swami, 1965). It is only because the Vedic formulae are claimed to be based on the natural principles on which the human mind works. This is a very exciting field and shows some efficient aphorisms which can be applied to different branches of engineeringsuch as computing and digital signal processing.

Digital multipliers are the core components of all the digital signal processing (DSP) applications and the speed of the DSP systems is largely determined by the speed of its multipliers. The two most common multiplication algorithms followed in the digital hardware are array multiplication algorithm and Booth multiplication algorithm. Since, in the array multiplier the partial products are calculated separately in parallel, the calculation time taken by is relative.

Conventional mathematics is an integral part of engineering education since most engineering system designs are based on various mathematical approaches. All the leading manufacturers of microprocessors and digital signal processing have developed their architectures to be suitable for conventional binary arithmetic methods. The need for faster processing speed is continuously driving major improvements in processor technologies, as well as the search for new algorithms. The Vedic mathematics approach is totally different and considered very close to the way a human mind works. A large amount of work has so far been done in understanding various methodologies (sutras). However, hardly any meaningful applications of Vedic algorithms have been thought of.This article, show how a successful attempt has been made to present twoand three-digit multiplication operations and the use of array multiplication.

This paper highlight a comparative study of vedic multipliers using UrdhvaTiryakbhyam with conventional hierarchical array multipliers (HAOM).

1. THE VEDIC MULTIPLICATION TECHNIQUE (UrdhvaTiryakbhyam Sutra)

   Urdhva and Tiryagbhyam words are derived from Sanskrit literature. Urdhva means Vertically and Tiryagbhyam means crosswise [2]. It is based on a novel concept, where the generation of all partial products can be done with the concurrent addition of partial products. Anyone can easily realize that this Vedic method probably makes difference for mental calculations [3]. For mental calculations it can be proved more convenient, as we can easily visualize Vedic multiplication line diagram shown . If someone tries to do

   multiplication mentally, in a conventional method, one would have to remember first row, then second row and likewise; then add all of them. In this case it might be difficult to remember these many numbers at a time. But in this Vedic method, to visualize line diagram and keep adding two consecutive product terms is easier for manual calculations. One needs to memorize only few numbers. So, one may find Vedic multiplication faster or more convenient for manual calculations [4].

   The two digit multiplication of 54 X 48 is given below.

   Step 1:

   Step 2:

   Step 3:

   Three-digit multiplication (532 X 438) is listed below.

   Step 1:

   Step 2:

   Step3:

   Step4:

   Step5:

   Answer: 532 * 438 = 233,016.

   The line diagram of three digits is representedas follows:

   I II III IV V

   The line diagram for four digits is given below:

   I II III IV V VI

   VII

2. CONVENTIONAL VS. VEDIC MULTIPLICATION SCHEME

   The Vedic mathematics is the ancient system of mathematics which has a unique technique for fast mental calculations, based on 16 sutras [6]. This approach is completely different from other multiplication algorithms and considered very close to the way a human mind works. Any ordinary human can perform mental operations for very small magnitude of numbers and hence Vedic mathematics provides techniques to solve operations with large magnitude of numbers easily. It covers explanation of several modern mathematical terms including arithmetic, trigonometry, plain, calculus, quadratic equations, factorization and spherical geometry. In [5], author has presented a hierarchical implementation of multiplication based on an array of array technique. This multiplier architecture is based on generating all partial products and their sums. We have considered this architecture name as HAOM.The author claim that HAOM his faster than array multipliers and booth multipliers.

3. Results and comparison

   A comparison of the processing times for Vedic and conventional mathematical methods in the case of two- and three-digit multiplications reveals the details listed below. Two-digit multiplication yields the results shown in Table 1. As evidenced from Table 1, a time saving of approximately 52% can be achieved using the Vedic method. Three-digit multiplication gives the results shown in Table 2. In the case of three-digit multiplication, approximately 39% of the processing time is saved. Similar results can be obtained on other processors as well. The above results are extremely encouraging so far as applications in digital signal processing (DSP) are concerned. Most of the important DSP algorithms, such as convolution, discrete Fourier tansforms, fast Fourier transforms, digital filters, etc. incorporate multiply-accumulate computations [7]. Since the multiplication time is generally far greater than the addition time, the total processing time for any DSP algorithm primarily depends upon the number of multiplications.

   Table 1: Two-digit multiplication.

   Method of multiplication	4 X 4	8 X 8	16 X 16
   Conventional Method	59	2,117	1.810
   Vedic Method	59	1,208	0.792

   Table 2: Three-digit multiplication.

   Method of multiplication	4 X 4	8 X 8	16 X 16
   Conventional Method	59	5,506	3.502
   Vedic Method	59	2,128	1.002

   6000

   5,506

   6000

   5,506

   5000

   5000

   4000

   4000

   3000

   2,128

   3000

   2,128

   1,208

   1,208

   1000

   1000

   59

   3.502

   59

   1.002

   59

   0.792

   59

   3.502

   59

   1.002

   59

   0.792

   0

   0

   conventional

   method

   Vedic Method

   conventional

   method

   Vedic Method

   4 X 4

   8 X 8

   16 X 16

   4 X 4

   8 X 8

   16 X 16

   2000

   2000

   Fig.1.comparison of two digit multipliers for 4,8 and 16 bits.

   6000

   5,506

   6000

   5,506

   5000

   4000

   3000

   2,128

   4 X 4

   8 X 8

   5000

   4000

   3000

   2,128

   4 X 4

   8 X 8

   2000

   1,208

   16 X 16

   2000

   1,208

   16 X 16

   1000

   59 3.502 59 1.002 59 0.792

   1000

   59 3.502 59 1.002 59 0.792

   0

   0

   conventional

   method

   Vedic

   Method

   conventional

   method

   Vedic

   Method

   Fig.2. comparison of three digit multipliers for 4, 8 and 16 bits.

4. Conclusion:

Vedic mathematical methods are derived from ancient systems of computations, now made available to everyone through the great work of Jagadguru Swami Sri BharatiKrisnaTirthaji Maharaja, who published a book on Vedic mathematics in 1965. [8] Compared to conventional mathematical methods, these are computationally faster and easy to perform.If the bits in the multipliers are continuously increases to N X N (where N is any number) bits than the multipliers showing better performance.

REFERENCE

1. Hesham A. Al-Twaijry, Michael J. Flynn, Technology Scaling Effects on Multipliers, IEEE Transactions on Computers, vol. 47, No. 11, pp.1201-1215, November 1998.

2. ManoranjanPradhan, Rutuparna Panda, Sushanta Kumar Sahu, Speed Comparison of 16×16 Vedic Multipliers, International Journal of Computer Applications (0975 8887), vol 21 No.6, May 2011.

3. Anveshkumar, Ashishraman, Low Power ALU Design by Ancient Mathematics, 2010 IEEE, Vol.5, pp.862-865, 2010.

4. Parth Mehta, DhanashriGawali, Conventional versus Vedic mathematical method for Hardware implementation of a multiplier, 2009 International Conference on Advances in Computing, Control, and Telecommunication Technologies, Trivandrum Kerala, India, pp. 640-642, December 2009.

5. AbhijitAsati, Chandrashekhar, A High-Speed, Hierarchical 16×16 Array of Array Multiplier Design, International Conference on Multimedia, Signal processing and Communication Technologies (IMPACT), pp. 161-164, march 2009.

6. Jagadguru Swami Sri BharatiKrisnaTirthaji Maharaja, Vedic mathematics, MotilalBanarsidass Publishers PvtLtd,Delhi, 2009.

7. Oppenheim, A.V. and Schafer, R.W., Digital Signal Processing. Englewood Cliffs: PrenticeHall (1970).