Design and Hardware Implementation of L-Type Resonant Step Down DC-DC Converter using Zero Current Switching Technique

DOI : 10.17577/IJERTV5IS050623

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  • Authors : Mouliswara Rao. R, Bhaskara Rao. K, Prasad. Ch
  • Paper ID : IJERTV5IS050623
  • Volume & Issue : Volume 05, Issue 05 (May 2016)
  • DOI : http://dx.doi.org/10.17577/IJERTV5IS050623
  • Published (First Online): 30-05-2016
  • ISSN (Online) : 2278-0181
  • Publisher Name : IJERT
  • License: Creative Commons License This work is licensed under a Creative Commons Attribution 4.0 International License

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Design and Hardware Implementation of L-Type Resonant Step Down DC-DC Converter using Zero Current Switching Technique

    1. Mouliswara Rao. R Assistant Professor, Department of EEE, AITAM, Tekkali, Andhra Pradesh, India

      Bhaskara Rao. K2

      2Assistant Professor, Department of EEE, AITAM, Tekkali, Andhra Pradesh, India

      Prasad. Cp

      3Assistant Professor, Department of EEE, AITAM, Tekkali, Andhra Pradesh, India

      Abstract- This paper presents the study, analysis, design implementation and simulation of L-type zero current switching (ZCS) resonant buck converter and also practically implemented in hardware. Due to the incorporation of LC based resonant circuit in conventional buck converter the switching losses drastically reduced in high power application. A mathematical calculation were done and implemented the 5W(5V/1A) rated DC-DC resonant ZCS buck converter and simulated using Pspice-Orcad capture software and hardware implemented having IC555 Timer and IRS2110 gate driver circuit for the MOSFET IRFP250.

      Keywords: Hard switching, Soft switching, Zero current Switching (ZCS)

      Fig 2.1: MOSFET with junction capacitance

      Cgd=Crss Cgs=Ciss- Crss Cds=Coss- Crss

      where Crss = small-signal reverse transfer capacitance.

      1. INTRODUCTION

        Generally DC-DC converters are having electronic devices such as SCR, MOSFET ,IGBT that are used to change DC electrical power efficiently from one voltage level to another. The use of one or more switches for the purpose of power conversion can be regarded as a SMPS. A few applications of DC-DC converters are where 5V DC on a personal computer motherboard must be stepped down to 3V, 2V or less. In all of these applications, we want to change the DC energy from one voltage level to another, while wasting as little as possible in the process. In other words, we want to perform the conversion with the highest possible efficiency.

      2. SWITCHING LOSSES

        In MOSFETs, the main switching losses are caused by the charging and discharging of the gate-to-source and gate-to-drain parasitic capacitance to turn on and off the device respectively. Figure 2.1 shows the physical representation of these capacitors. The MOSFET parasitic capacitances are given in terms of the device data sheet parameters, and as follows. Ciss,Coss,Crss

        Ciss = small-signal input capacitance with the drain and source terminals are shorted.

        Coss = small-signal output capacitance with the gate and source terminals are shorted.

        A converter basically consists of an array of onoff electronic switches that use power semiconductor devices. If the switches are considered ideal or lossless (zero conduction

        drop, zero leakage current, and instantaneous turn-on and turn-off times), the instantaneous and average power will balance at input and output of the converter. Switching mode operation makes the converter nonlinear, thus generating source and load harmonics and also EMI problems.

        In Hard-Switching Topologies shown in fig2.2 a real semiconductor switch, the switch voltage or switch current do not go to zero instantaneously at the instant of turn-on or turn-off. The large overlap between the voltage and current waves during switching creates a large switching loss, thus reducing the efficiency of the converters. As the switching frequency increases the losses are increased drastically in high power applications. Turning on and turning off the power electronic switches with switching losses is known as hard switching.

        Fig2.2: Loss of power during hard-switching

        In Soft-Switching Topologies, The main idea in soft switching is to prevent or minimize the switching overlap so that the switching loss is minimal. Soft switching techniques force the voltage or current to be zero during the time of transition; therefore there is no overlap between voltage and current and (ideally) no switching loss. Hence, the problem of switching losses and EMI due to hard

        The circuit of figure is initially in the steady state with constant load current 0. Filter inductor 1 is relatively large to assume that current 0 in 1 is almost constant at 0. Initially switch S is open; resonant circuit parameters have

        = 0 in L and = 0 across C and the load current

        0 freewheels through the diode D.

        For the sake of convenience working of this converter is divided into five modes as under. For all these modes, time t is taken as zero at the beginning of each mode.

        Mode-1 (0t 1):

        At t=0, switch S is turned on. As 0 is freewheeling through diode D, voltage across ideal diode = 0 and also = 0, fig.3.1(mode-1). it implies that source voltage

        gets applied across L and the switch current begins to flow through , switch S, L and diode D. Therefore, =

        . It gives = . It shows that inductor or switch

        current rises linearly from its zero initial value. The diode current is given by

        switching converter operation is overcome by using soft switching. There are two types of soft switching which are

        = 0

        = 0

        zero-voltage switching (ZVS) and zero-current switching (ZCS). There are many ZVS and ZCS techniques have

        At t= 1,

        = . = .

        been published. The selection of switching technique is important when dealing with high power converter.

        Figure2.3 shows the switching transient of the switch in a soft-switched circuit and it shows the switching

        This gives 1

        = 0 .

        1 0

        losses are decreased with high amount.

        Also, at t= 1, = 0 0 = 0. Soon after

        1, tends to reverse, diode D gets turned off. As a result of this, short circuit across C is removed.

        Mode 2 (0 2):

        Switch S remains on. As D turns off at t= 0, current 0 flows through , , 1and R. In fig.3.1(mode-1) and (mode-2), constant current through 1 and R is represented by current source 0. Also a current begins to build up through resonant circuit consisting of , and C in series. Inductor current is, therefore, given by

        = 0 + = 0 + sin 0

        Fig2.3: Loss of power during soft-switching

        Where = = and 0 = 1 . Here 0 = is

        0

      3. L-TYPE ZCS RESONANT CONVERTER MODES OPERATION AND WAVEFORMS

        An L-type ZCS resonant converter is shown above figure.3.1 The switching device S in the figure can be GTO, Thyristor, BJT, power MOSFET or IGBT. At low

        the characteristic impedence of resonant circuit.

        The capacitor current is = sin 0 and capacitor voltage is given by

        () = (1 cos 0 )

        The peak value of current is = 0 + and

        kilohertz range; GTO, thyristor or IGBT is used whereas

        for megahertz range; power MOSFETs are preferred.

        it occurs at t=

        20

        = . At this instant, =

        2

        2

        Inductor L and capacitance C near the dc source

        from

        [1 cos ] = = .

        the resonant circuit whereas 1, 1 near the load constitute a filter circuit. Direction of currents and polarities of

        When t = =

        2

        2

        0

        2

        2

        = , capacitor voltage reaches

        voltages as marked in figure are treated as positive.

        peak value = [1 cos ] = 2 = 0.

        Also, at = 2, = 0, . , switch current drops from peak value (0 + ) to 0.

        Mode 3 (0t 3):

        Switch S remains on. At t= 0, capacitor voltage is 2. As teds to reverse at t = 0, capacitor begins to discharge and force a current

        = sin 0 opposite to , fig.3.1.(mode-3) so that inductor or device current is given by

        = 0 = 0 sin 0

        The waveforms for switch or inductor current , capacitor voltage , diode current , capacitor current and voltage across switch 1 as are shown in fig.3.1 waveforms. It is seen that at turn-on at t=0 (0 t

        1), switch current =0, therefore switching loss = 0. Similarly, at turn-off at 3(0t 3), =0 and therefore

        = 0. It shows that the switching loss during turn-on and turn-off processes is almost zero. The peak resonant

        And capacitor voltage = 2 cos 0 . Current falls to

        zero

        current =

        0

        must be more than the load current ,

        when t= 3,

        i.e., = 0 = 0 sin 0 3

        Or 3 = sin1 0

        At t= 3, =

        202

        otherwise switch current will not fall to zero and switch

        1 will not get turned off.

        The load voltage 0 can be regulated by varying the period 5. It is obvious that longer the period 5, lower is the load voltage.

        2 cos 0 3 = 2 [

        ] = 3 During

        this mode, = sin and as falls to zero at 3, switching device S gets turned off. Note that current in this mode flows opposite to its positive direction, it is therefore shown negative in fig3.1(mode-3) At t= 3, the value of = 0.

        Mode 4 (0 4):

        As switch S is turned off at t= 0, capacitor begins to supply the load current 0 as shown in fig3.1.(mode-4). Capacitor voltage at any time t is given by

        = 3 1 .

        As magnitude of capacitor current = 0 is constant,

        = 3 0

        This mode comes to an end when falls to zero at t= 4.

        or 3 0 4 = 0

        4

        4

        or = .3

        0

        At t=0, = 3 and at t= 4, = 0 = as shown in fig3.1(mode-4).As is constant, capacitor discharges linearly from 3 to zero and varies linearly from ( 3 ) to as shown in fig.3.1

        Mode 5 (0 5):

        At the end of mode 4 or in the beginning of mode 5, capacitor voltage is zero as shown in fig.3.1 waveforms. As tends to reverse at t=0, diode gets forward biased and starts conducting, fig.b.(mode-5). The load current flows through diode so that = during this mode.

        This mode comes to an end when switch 1 is again turned on at t=5. The cycle is now repeated as before. Here 5 = (1 + 2 + 3 + 4).

        Figure 3.1: L – Type ZCS Resonant Converter circuit , modes of Operation and waveforms

      4. DESIGN OF CONVERTER

        Design example: To verify the operation and performance of the proposed converter, a 5W (5V*1A) experimental prototype circuit was built for battery charging application. A design procedure for 5-W converter is presented. The specifications are as follows:

        Vin

        = 12 V

        So MOSFET gate signal should be held high until (µs).And it should be turn off before 2 is reached. The gate

        Vout 5 V

        Iout = 1 A

        The selection of the resonant inductor and capacitor is determined by the need to satisfy the relation

        signal of 10.6 µs will work nice in the case.

        The second integral is the area of a triangle. The triangle peak value is given by

        (2) = 12(1 cos(303.6)) = 5.36

        The time until reaches zero is:

        Vin ZC

        >

        t= (2)/() = 5.36 ÷ ( 1 ) = 1.072

        0.2×106

        0.2×106

        Area= (0.2*5.362)/ (2*1) =2.87*106 Vs

        Where, =

        So keeping these things in mind value chosen are:

        = = 0.2 micro farad

        = 1 = 20 micro Henry

        According to the relation given modes of operation, as the transistor turn on, causing current to ramp at

        From (i)

        0

        0

        [2 (1 cos( ))]

        = 12[10.6 + 0.0923] 106

        = 1.47*104

        So the average output voltage is

        di dt

        = 12 10^6 = 0.6 106 A/s

        20

        < >= (1.47 104

        + 2.87 106

        )/

        So the diode current will be zero in micro seconds after the transistor turn on, then the circuit enters into mode 2.

        = = 200.2 = 10

        ( )

        According to relation given in modes of operation,

        = = 12/10= 1.2

        This show

        > . So the resonant condition gets fulfilled.

        However if the load increases above 1.2 A, this LC combination will no longer support soft switching.

        Since the desired output is 5V then:

        5 = (1.47 104 + 2.87 106)/T

        T = 29.97 µs 30

        So from above we get f 33.33 kHz in ideal condition. But in practical case we have to take care the drop across the diode also over the period of time which is around 1.5 V during turn on time of diode.

        6T=(147+2.87)-1.5(T-33.53)

        [33.53 is the off time of diode]

        Which gives T 30.79 µs and frequency = 32.478 kHz By taking other no ideality in MOSFET, inductor, capacitor

        = 1 = 500000 rad/sec

        practical switching frequency is coming around 36.6 kHz.

        = 2 = 79.577 kHz From the relation

        =56.4426

        IL(t) will be zero at 180.0001 (in degree) and 359.999 (in degree).corresponding time can be calculated as

        180

        180

        1 = 180.0001

        500000 = 6.28

        2 = 359.99 /180 500000 = 12.6

        The proposed ZCS buck converter for USB power adapter 5V, 1A is presented. The converter features were listed in Table1

        Input voltage

        12V

        Output voltage

        5V

        Output current

        1A

        Switching frequency

        33.33 kHz

        Duty cycle

        0.333 or 33.33%

        Resonant inductor

        20uH

        Resonant capacitor

        0.2 uF

        Output filter induct

        2.0mH

        Filter capacitor

        20uF

        Load resistor

        5 ohms

      5. SIMULATION AND HARDWARE RESULTS

        The above Proposed and designed converter is Simulated using PSpice-Orcad Capture Software and observed the results i.e. Current through the resonant inductor and voltage across resonant capacitor and MOSFET gate triggered pulses and output voltage

        5.1 Pspice circuit diagram

        Fig5.1: Pspice model of ZCS buck converter

        Simulated Results

        Fig5.2: Pulses to the MOSFET

        Fig5.3: Current through the resonant inductor

        Fig5.4: Voltage across the resonant capacitor

        Fig5.5: Voltage across the output terminal

      6. EXPERIMENTAL RESULTS

        5W (5V/1.0A) prototype of the ZCS converter, as shown in Fig.5.1 is built to verify the theory. And the result is compared with simulation. The specifications of the experimental prototype is as follows: Input voltage = 12V, Output voltage = 5V, output current = 1.0Amps

        Circuit parameters of the proposed converter are as follows.

        1. Switch: MOSFET IRFP250.

        2. Diode: IN4001.

          The R1 and R2 resistors of 555 Timer are calculated as below

          Ton 0.693R1C1

        3. Resonant capacitor: 0.2 uF.

        4. Filter capacitor: 20uF.

        5. Resonant inductor: 20uH.

          R1

          Ton

          0.693C1

        6. Output filter inductor: 2.0mH.

        7. Load resistor 5 ohms

        In experimental setup we can generate triggering pulses to drive the MOSFET by using 555 timer. Here we generated 7.76 V as a gate pulse from the timer. This pulse input is not enough to drive the Mosfet IRFP250. Hence we have to mplify the signal beyond 10 volts. Because the minimum voltage required to drive the MOSFET is to be 10 volts. To amplify this signal we are using MOSFET driver IRS2110.Now we have the pulse with the amplitude of 15.6 volts. This voltage is enough to drive our MOSFET IRFP250.

        After applying this gate pulse we observe the corresponding waveforms comparing with the simulation results.

        IC555 Timer

        Fig6.1: Pin configuration of 555 Timer

        The On period Ton=10 micro seconds and C1=1 nano farads Then the value R1=14.4K ohm

        Toff 0.693R2C1

        R Toff

        1

        1

        2 0.693C

        The On period Toff=20 micro seconds and C1=1 nano farads

        Then the value R2=28.9K ohm

        The resultant 555 timer configuration is given below

        Fig6.2: circuit configuration of 555 Timer

        IRS2110 Gate Driver Circuit

        Fig6.3: Pin configuration of IRS2110

        Fig6.4: IRS2110 as a low side MOSFET driver

        5.3.3 Experimental Setup and Results

        Fig6.5: Hardware circuit of L-type ZCS resonant buck converter

        Fig6.6: Pulses from the 555 Timer

        Fig6.7: Pulses from the IRS2110

        Fig6.8: Voltage across resonant capacitor

        Fig6.9: Voltage across MOSFET IRFP250

      7. CONCLUSION

In this paper we analyse, design and implemented the ZCS based 5W(5V/1A) resonant DC-DC buck converter. The various modes of operation of L-type ZCS resonant converter and time analysis of the resonant capacitor voltage and resonant inductor current waveforms analyzed. The ZCS resonant convetrter is simulated using

Pspice-Orcad capture software and also implemented the experimental(hardware) proto type. In hardware implementation the required pulses are generated by IC555 Timer and amplified by IRS2110 i.e used for switching the MOSFET IRFP250. The simulated results resonant capacitor voltage, resonant inductor current and output voltage executed successfully are compared with the hardware results and also compared with the theoretical waveforms. At final we concluded that in high power applications the switching losses are reduced drastically due to incorporation of LC based resonant circuit in conventional buck converter and improved the performance and efficiency of the converter.

REFERENCES

  1. Philip T Krein, element of power electronics, First Indian Edition, pp.300-307, 2008.

  2. Naseem Zaidi, Aziz Ahmad Analysis, Design and Control of Zero Current Switching DC To DC Buck Converter, International Journal of Scientific and Research Publications, Volume 2, Issue 7, July 2012.

  3. Irfan Jamil, Zhao Jinquan and Rehan Jamil, Analysis, Design and Implementation of Zero-Current Switching Resonant Converter DC- DC Buck Converter, International Journal of Electrical and Electronics Engineering (IJEEE), Vol. 2, Issue 2, May 2013.

  4. Anuj Verma1, Dheresh Upadhyay ZCS Quasi Resonant Converter Fed Resistive Load Experimental Investigation International Journal of Research and Innovations in Science and Technology Volume 1 , Issue 1 , 2014.

  5. Power Electronics – Dr.P.S. Bimbhra, Khanna Publishers.

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