Flexible D-STATCOM Performance as a Flexible Distributed Generation in Mitigating Faults

Flexible D-STATCOM Performance as a Flexible Distributed Generation in Mitigating Faults

Mr.Y.Peraiah, Mr. M.Balasubba Reddy, T.Madhu

(Dept of Electrical and Electronic Engineering, Prakasam Engineering college, kandukuru

( Dept of Electrical and Electronic Engineering , Professor & H.O.D, Prakasam Engineering college.) ( Dept of Electrical and Electronic Engineering , Professor & H.O.D, Prakasam Engineering college.)

Abstract

This paper proposes a flexible D-STATCOM(Distribution Static compensator) and its new controller system, that be able to both mitigate all types of faults and operate as a Distributed Generation (DG), when it supplies power to sensitive loads while the main utility source is disconnected (i.e. it is under islanded operating condition). Thus D-STATCOM operates same as a flexible DG (FDG) and consequently, it is called Flexible D-STATCOM (FD-STATCOM). This paper validates the performance of FD-STATCOM system to mitigate power quality problems and improve distribution system performance under all types of system related disturbances and system unbalanced faults, such as Line-to-Line (LL) and Double Line to Ground (DLG) faults and supplies power to sensitive loads under islanding condition. In this paper, the 12-pulse D-STATCOM configuration with IGBT is designed and the graphic based models of the D-STATCOM are developed using the PSCAD/EMTDC electromagnetic transient simulation program. The reliability and robustness of the control schemes in the system response to the voltage disturbances caused by LL and DLG faults and islanded operating condition are obviously proved in the simulation results.

1. INTRODUCTION

   DG provides many potential benefits, such as peak shaving, fuel switching, improved power quality and reliability, increased efficiency, and improved environmental performance. There is a high demand for utility DG installations due to their advantages of deferment or upgrading the distribution infrastructure. Most DG units are connected to the distribution system through a shunt nonlinear link such as a VSI or a Current Source Inverter (CSI) .

   There are many types of DG. Among them are wind, bio- gas, fuel cells and solar cells. Generally, these sources are connected to grid through inverters and their main function is to deliver active power into the grid. The DGs are designed to supply active power or both active and reactive power. Flexible DG systems would indeed be possible to implement integrated functions like harmonic mitigation, unbalance mitigation, zero sequence component suppression schemes, and etc. The new trends in power electronics converters make the implementation of such multiple functions feasible. A DG is islanded when it supplies power to some loads while the main utility source is disconnected. Islanding detection of DGs is considered as one of the most important aspects when interconnecting DGs to the distribution system. With the increasing penetration and reliance of the distribution systems on DGs, the new interface control strategies are being proposed .

   This paper proposes a flexible D-STATCOM system designed to operate in two different modes. Initially, it can mitigate voltage sags caused by LL and DLG faults. Secondly, it can mitigate voltage sags caused by three-phase open-circuit fault by opening the three phases of a circuit-breaker and disconnecting the main power source (islanding condition).

   Reactive power compensation is an important issue in the control of distribution systems. Reactive current increases the distribution system losses, reduces the system power factor, shrink the active power capability and can cause large-amplitude variations in the load-side voltage . Various methods have been applied to mitigate voltage sags. The conventional methods use capacitor banks, new parallel feeders, and uninterruptible power supplies (UPS). However, the power quality problems are not completely solved due to uncontrollable reactive power compensation and high costs of new feeders and UPS. The D- STATCOM has emerged as a promising device to provide not only for voltage sag mitigation but also for a host of other power quality solutions such as voltage stabilization, flicker suppression, power factor correction, and harmonic control . D-STATCOM is a shunt device that generates a balanced three -phase voltage or current with ability to control the magnitude and the phase angle . Generally, the D-STATCOM configuration consists of a typical 12-pulse inverter arrangement, a dc energy storage device; a coupling transformer connected in shunt with ac system, and associated control circuits, as shown in Fig. 1. The configurations that are more sophisticated use multi-pulse and/or multilevel configurations. The VSC converts the dc voltage across the storage device into a set of three-phase ac output voltages. These voltages are in phase and coupled with the ac system of network through the reactance of the coupling transformer. A control method based on RMS voltage measurement has been presented in and where they have been presented a PWM-based control scheme that requires RMS voltage measurements and no reactive power measurements are required. In addition, in this given method, Clark and Park transformations are not required. However, they have been investigated voltage sag/swell mitigation due to just load variation while no balanced and

   have been investigated. In this paper, a new control method for mitigating the load voltage sags caused by all types of fault is proposed. In and , a Lookup Table is used to detect the proportional gain of PI controller, which is based only on Trial and Error. While in this paper, the proportional gain of the PI controller is fixed at a same value, for all types of faults, by tuning the transformer reactance in a suitable amount. Then the robustness and reliability of the proposed method is more than the mentioned methods. In this method, the dc side topology of the D-STATCOM is modified for mitigating voltage distortions and the effects of system faults on the sensitive loads are investigated and the control of voltage sags are analyzed and simulated.

2. THE PROPOSED FD-STATCOM STRUCTURE

   Unlike the Unified Power Flow Controller (UPFC) which consist from two parts, series and shunt, to manage the flow of active power from one part to the other, FDG consist of one part only, because it has a supply of the active power from DG system. Fig. 1 shows the schematic representation of the FD- STATCOM. The basic electronic block of the FD-STATCOM is the voltage source inverter that converts an input dc voltage into a three-phase output voltage at fundamental frequency. These voltages are in phase and coupled with the ac system through the reactance of the coupling transformer. Suitable adjustment of the phase and magnitude of the FD -STATCOM output voltages allows effective control of active and reactive power exchanges between the FD-STATCOM and the ac system.

   Fig. 2 shows a typical 12-pulse inverter arrangement utilizing two transformers with their primaries connected in series. The first transformer is in Y-Y connection and the second transformer is in Y- connection. Each inverter operates as a 6-pulse inverter, with the Y- inverter being delayed by 30 degrees with respect to the Y-Y inverter. The IGBTs of the proposed 12-pulse FD-STATCOM are connected anti parallel with diodes for commutation purposes and charging of the DC capacitor . This is to give a 30 degrees phase shift between the pulses and to reduce harmonics generated from the FD-STATCOM. The FD-STATCOM is connected in shunt to the system.

   Fig 1. Schematic representation of the FD-STATCOM

   Fig. 2. The 12-pulse FD-STATCOM arrangement

3. CONTROL STRATEGY

   The block diagram of the control scheme designed for the FD-STATCOM is shown in Fig. 3. It is based only on measurements of the voltage VRMS at the load point.

   Fig. 3. Control scheme designed for the FD-STATCOM

   The voltage error signal is obtained by comparing the

   measured VRMS voltage with a reference voltage, VRMS_Ref. A PI controller processes the difference between these two signals in order to obtain the phase angle that is required to drive the error to zero. The angle is used in the PWM generator as the phase angle of the sinusoidal control signal. The switching frequency used in the sinusoidal PWM

   generator is fsw=1450 Hz and the modulation index is Ma 1 . The modulating angle is applied to the PWM generators in phase A. The angles of phases B and C are shifted 120 and 240 degrees, respectively.

4. PROPOSED CONTROL METHOD

   In this paper, in order to mitigate voltage sags caused by LL and DLG faults and to supply power to sensitive load, a new method is proposed in which the FD-STATCOM and Super Capacitor Energy Storage system (SCESS) are integrated. Considering this fact that all types of fault may occur in distribution system, controller system must be able to mitigate any types of voltage sags. The integration and control of SCESS into a FD-STATCOM is developed to mitigate such problems, enhance power quality and improve distribution system reliability . The new method develops the control concepts of charging and discharging the SCESS by D- STATCOM, and validates the performance of an integrated D- STATCOM/SCESS for improving distribution system performance under all types of system related disturbances and system faults, such as LL and DLG faults and under islanded operating condition. The SCESS is explained as follows

   Super capacitor is a new energy device emerged in recent years. It is also known as double -layer capacitor. The electrical double-layer capacitor is a novel energy storage component developed in 1970s. Its pole boards are made of activated carbon, which have huge effective surface so the capacitance could attain several farad even thousands farad. When it is charged, the electric charges are spontaneously distributed negative and positive ion layers on the interface between pole boards and electrolyte, so the super capacitor does not have electrochemical reaction and only have electric charges adsorption and desorption when it is charged and discharged. It has many merits such as high charge/discharge current, less maintenance, long life and some other perfect performance. At the same time, its small leakage current enables it has long time of energy storage and the efficiency could exceed 95% .

   The structure of SCESS is shown in Fig. 4. Its circuit is mainly composed of three parts: rectifier unit, energy storage unit, and inverter unit. Rectifier unit adopts three phase full bridge rectifier to charge super capacitor and supply dc power energy to inverter unit. Inverter unit adopts three phase voltage inverter composed of IGBTs, it connects to power grid via transformer. When SCESS works normally, voltage at dc side is converted into ac voltage with the same frequency as power grid through IGBT inverter. When only considering fundamental frequency, SCESS can be equivalent to ac synchronizing voltage source with controllable magnitude and phase.

   Energy storage unit i.e. super capacitor energy storage arrays are composed of many monolithic super capacitors. If a large number of super capacitors be in parallel, at the same time improving capacity of power electronics devices in power conversion system can be easily composed of more large capacity SCESS, but operational reliability and control flexibility will not be affected. Super capacitor is very easily modularized, when required, and it is very convenient in capacity expansion.

   SCESS based on DG connected to power grid can be divided into three function blocks: super capacitor arrays components stored energy, power energy conversion system in energy transformation and transmission, and an integrated control system.

   SCESS stores energy in the form of electric field energy using super capacitor arrays. At the lack of energy emergency or when energy needed, the stored energy is released through control system, rapidly and accurately compensating system active and reactive power, so as to achieve the balance of power energy and stability control.

   Determining the number of energy storage module can save super capacitors, and further reducing volume, quality and cost of the energy storage unit.

   It is assumed that each super capacitor is represented as an equivalent resistance req and equivalent ideal capacitor ce in series. R and C of super capacitor bank are R=ns.req/np and C= np.ce/ns, respectively; that ns and np are the number of monolithic super capacitors connected in series and parallel for constituting storage energy module .

   In this paper, SCESS is made of 10 arrays in parallel with ce=3 (mF) and req=1 () for every array, as shown in Fig. 4.

   Fig. 5 shows a typical distribution system controlled by this method. Also, when Timed Fault Logic operates LL and DLG faults are exerted, therefore, the FD-STATCOM supplies reactive power to the system. In this method, the proportional gain is 300. The speed of response and robustness of the control scheme are clearly shown in the simulation results.

   Fig. 4. Structure of SCESS

   Fig. 5. Distribution system with FD-STATCOM integrated with SCESS and controller

5. SIMULATION RESULTS

   Fig. 5 shows the test system implemented in PSCAD/EMTDC to carry out simulations for the FD- STATCOM. The test system comprises a 230 kV transmission system. A balanced load is connected to the 11 kV, secondary side of the transformer. Brk. 1 is used to control the operation period of the FD-STATCOM. A 12-pulse FD-STATCOM is connected to the tertiary winding by closing Brk. 1 at 0.2 s, for maintaining load RMS voltage at 1pu. A SCESS on the dc side provide the FD-STATCOM energy storage capabilities. The simulations are carried out for both cases where the FD- STATCOM is connected to or disconnected from the system.

   The simulations of the FD-STATCOM in fault condition are done using LL and DLG faults and under islanded operating condition. In LL and DLG faults the faulted phases are phases A and B while in islanded operating condition, three conductors open by Brk. 2 in 0.4 0.5 s. The duration of the islanding condition are considered for about 0.1 s and the LL and DLG faults are considered for about 0.3 s. The faults are exerted at 0.4 s. The total simulation time is 1.6 s.

   In this paper, the FD -STATCOM uses the proposed control method to mitigate the load voltage sags due to all types of faults. The simulations are done for all types of faults introduced in the 11 kV distribution systems as follows:

   1. Simulation results for Line-to-Line fault

      Figs. 6 and 7 show the RMS voltage and Vab (line voltage) at the load point, respectively, for the case when the system operates without FD-STATCOM and under LL fault. In this case, the voltage drops by almost 20% with respect to the reference value.

      20

      10

      0 –

      10

      -20

      Vref

      1.20

      0.90

      0.60

      0.30

      0.00

      1.20

      0.90

      0.60

      0.30

      0.00

      Vrms

      Vrms

      0.40

      0.40

      0.80

      Time (Sec)

      0.80

      Time (Sec)

      1.20 1.60

      Fig. 8. Compensated RMS voltage under LL fault

      Vab (kV)

      In t = 0.2 s, the FD-STATCOM is connected to the distribution system. The voltage drop of the sensitive load point is mitigated using the proposed control method. Fig. 8 shows the mitigated RMS voltage using this new method where a very effective voltage regulation is provided.

      Fig. 9 shows the compensated Vab at the load point in interval 0.4- 0.7 s, (when the voltage drops by almost 20% because of the unbalanced LL fault by operating Timed Fault Logic). Fig. 10 shows the Vab frequency spectrums during mitigation of voltage sag that is presented in percent. The THD in percent for Vab in during mitigation of LL fault occurrence is 0.034%. Because of a 12-pulse FD-STATCOM is used in this paper, then the THD for Vab is very small.

      0.350 0.400 0.450 0.500 0.550 0.600 0.650 0.700

      Time (Sec)

      Fig. 9. Compensated line voltage (Vab) at the load point

      Vab – frequency spectrum

      100.0

      0.0

      Fig. 10. Frequency spectrum for Vab during mitigation of LL fault

      1.20

      0.90

      0.60

      0.30

      0.00

      Vrms Vref

      0.40 0.80 1.20 1.60

      Time (Sec)

   2. Simulation results for Double Line to Ground fault

      Figs. 11 and 12 show the RMS voltage and line voltage Vab at the load point, respectively, for the case when the system operates without FD-STATCOM and unbalanced DLG fault is occurred. The RMS voltage faces with 20% decrease with respect to the reference voltage.

      Figs. 13 and 14 show the compensated RMS voltage and mitigated voltage of Vab at the load point, respectively, under DLG fault using proposed method. It is observed that the proposed method has correctly mitigated voltage sag.

      Fig. 15 shows the Vab frequency spectrums during

      20

      10

      0 –

      10

      -20

      Fig. 6. The RMS voltage (VRMS) at PCC without FD-STATCOM

      Vab (kV)

      mitigation of voltage sag. The THD of Vab in during mitigation of DLG fault occurrence is very suitable and 0.036%.

      Vrms Vref

      1.20

      0.90

      0.60

      0.30

      0.350 0.400 0.450 0.500 0.550 0.600 0.650 0.700

      Time (Sec)

      Fig. 7. Vab at PCC without FD-STATCOM

      0.00

      0.40 0.80 1.20 1.60

      Time (Sec)

      Fig. 11. The RMS voltage (VRMS) at PCC without FD-STATCOM

      Vab (kV) Vab (kV) Vbc (kV) Vca (kV)

      20 20

      10 10

      0 0

      -10

      -20

      0.350 0.400 0.450 0.500 0.550 0.600 0.650 0.700

      -10

      -20

      Time (Sec) 0.380 0.400 0.420 0.440 0.460 0.480 0.500

      Fig. 12. Vab Line voltage at PCC without FD-STATCOM Time (Sec)

      Fig. 17. Line voltages at PCC without FD-STATCOM

      1.20 Vrms Vref

      Iloada (kA) Iloadb (kA) Iloadc (kA)

      0.60					0.10
      0.30					0.00
      0.00					-0.10
      	0.40	0.80	1.20	1.60	-0.20

      0.60					0.10
      0.30					0.00
      0.00					-0.10
      	0.40	0.80	1.20	1.60	-0.20

      0.90 0.20

      20 Vab (kV)

      1

      0

      Time (Sec)

      Fig. 13. Compensated RMS voltage

      0.375 0.425 0.475 0.525

      Time (Sec)

      Fig. 18. Load currents without FD-STATCOM in islanding condition

      Figs. 19, 20 and 21 show the mitigated RMS voltage, line

      voltages at the load point and compensated load currents,

      0

      0

      respectively, using the proposed method.

      -10 It is observed that the RMS load voltage is very close to

      the reference value, i.e., 1pu and FD-STATCOM is able to

      -20

      supply power to sensitive loads, correctly.

      0.350		0.400		0.450			0.500		0.550	0.600	0.650				0.700
      								Time (Sec)

      0.350		0.400		0.450			0.500		0.550	0.600	0.650				0.700
      								Time (Sec)

      Fig. 22 shows the Vab frequency spectrums during

      Fig. 14. Mitigated line voltage Vab at the load point mitigation of voltage sag caused by islanding condition.

      100 .0

      Vab – frequency spectrum

      1.20

      0.90

      0.60

      Vrms Vref

      0 .0 0.30

      Fig. 15. Frequency spectrum for Vab during mitigation of DLG fault

   3. Simulation results under islanded operating condition

   Figs. 16, 17 and 18 show the RMS voltage, line voltages and load currents (versus kA) at the PCC, respectively, for the case when the system operates without FD-STATCOM and under islanded operating condition.

   0.00

   Vab (kV)

   Vbc (kV)

   Vca (kV)

   Vab (kV)

   Vbc (kV)

   Vca (kV)

   20

   0.40 0.80 1.20 1.60

   Time (Sec)

   Fig. 19. Compensated RMS voltage

   1.20 Vrms Vref 10

   0.90 0

   0.60 -10

   0.30

   0.00 -20

   0.40 0.80 1.20 1.60 0.380 0.400 0.420 0.440 0.460 0.480 0.500

   Time (Sec) Time (Sec)

   Fig. 16. VRMS at PCC without FD-STATCOM under islanding condition Fig. 20. Compensated line voltages at the load point

   The THD of Vab under islanded operating condition is very close to zero and 0.03%.

   The proposed method merits with respect to the classic methods are simplicity and control convenience and being flexible, i.e. it can mitigate voltage distortions caused by both LL/DLG faults and islanded operating condition only with the same control system setting.

   The presented results show that the proposed FD- STATCOM and its controller system not only could mitigate voltage distortions caused by the faults but also have a suitable performance under the islanded operating condition as a FDG.

6. CONCLUSIONs

In this paper, a flexible D-STATCOM is proposed that could both mitigate unbalanced faults (such as LL and DLG faults) and operate as a DG, when it supplies power to sensitive loads while the main utility source is disconnected. As a result, D-STATCOM operates same as a FDG and consequently, it is called FD-STATCOM. In addition, this paper has proposed a new control method for mitigating the voltage sags, caused by unbalanced faults and islanding condition, at the PCC. The proposed method is based on integrating FD-STATCOM and SCESS. This proposed control scheme was tested under a wide range of operating conditions (under unbalanced faults and islanded operating condition), and it was observed that the proposed method is very robust in

every case. In addition, the regulated VRMS voltage showed a reasonably smooth profile. It was observed that the load voltage is very close to the reference value, i.e., 1pu and the voltage sags are completely minimized. Moreover, the simulation results were shown that the charge/discharge of the capacitor is rapid through this new method (due to using SCESS) and hence the response of the FD-STATCOM is fast.

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AuthorsAinformation

Y.PERAIAH

PURSUING M-TECH, EEE PE IN PRAKASAM ENGG COLLEGE.

MR.M.BALASUBBA REDDY

Proffessor&H.O.D, EEE Dept IN PRAKASAM ENGG COLLEGE

MR.T.MADHU

ASST.PROFESSOR, EEE Dept IN PRAKASAM ENGG COLLEGE