Mitigation of voltage Imbalance in the DC link of a Split Link Four Wire Inverter

Mitigation of voltage Imbalance in the DC link of a Split Link Four Wire Inverter

Jasna M A Anitha P

M.Tech Scholar, EEE Department Asst.Professor, EEE Department

ASIET Kalady, Mahatma Gandhi University Kottayam ASIET Kalady, Mahatma Gandhi University Kottayam Kerala, India Kerala, India

Abstract Renewable energy sources (RES) are being connected in distribution system utilizing power electronic converters. The grid interfacing inverter is a major element of a DG system as it interfaces the renewable energy source to the grid and delivers the generated power. There are several topologies to connect the DG units to the three-phase distribution network. Three-phase four-wire inverters, with three-leg or four-leg topology, are useful for interfacing distributed generation to networks of unbalanced loads, but neither of the available circuit topologies is ideal. The split-link three-leg topology (with six switches) suers from poor dc voltage utilization compared with the four-leg topology (with eight switches). The four-leg topology has an electromagnetic compatibility (EMC) diculty because it imposes large-amplitude high-frequency voltages between the dc link bus bars and ground. To obtain both good dc voltage utilization and good EMC performance, it is proposed to use a split-link inverter with an active balancing circuit (also eight switches). The balancing circuit is used to modulate the dc bus bar oset voltage to make better use of the available dc-link voltage. Imbalance across the dc link capacitor can be avoided by using different control strategies. Outcome of DC-link capacitor voltage variation on inverter switching states is accessible . We are proposing a novel DC link balancing method. The algorithm which we proposed here is the improvement of variable switching frequency control policy. System performance is evaluated through MATLAB. Closed loop current control and the sensed output voltage control is established by using MATLAB simulation.

Keywords Four Leg Inverter, DC Link, Electromagnetic compatibility

etc. IGBT based three phase two level bridge converter has become the standard topology for these applications. In few cases provision for a fourth wire is a necessity. This requirement is met either by a fourth leg in the inverter or by using the midpoint of DC bus capacitors. Generally such requirement arises to cater single phase loads or to provide earth fault protection or in a transformer less application

1. GRID INTERACTIVE SYSTEM

   The system consists of RES connected to the dc-link of a grid- interfacing inverter as shown in figure. The voltage source inverter is a key element of a DG system as it interfaces the renewable energy source to the grid and delivers the generated power. The RES may be a DC source or an AC source with rectier coupled to dc-link. Usually, the fuel cell and photo voltaic energy sources generate power at variable low dc voltage, while the variable speed wind turbines generate power at variable ac voltage. Thus, the power generated from these renewable sources needs power conditioning (i.e., dc/dc or ac/dc) before connecting on dc-link [6][8]. The dc- capacitor decouples the RES from grid and also allows independent control of converters on either side of dc-link.

   1. INTRODUCTION

Over the last years, an increase of distributed generation units connected to the low-voltage distribution network is observed. These distributed geration units are fed by renewable resources like Photovoltaic (PV), (micro-) Combined Heat Power (CHP) and Wind Power [1, 2]. This leads to the development of relatively small generation units, geographically distributed and connected to the distribution network. The increasing presence of single phase distributed generators and unbalanced loads in the electric power system may lead to unbalance of the three phase voltages, resulting in increased losses and heating. Distribution network operators are seeking to install larger DG units by means of three-phase connections instead of single phase to reduce voltage unbalance. There are several possible topologies to connect the DG units to the three-phase distribution network. These topologies can be divided into three groups: the three phase three-wire inverters, the three- phase four-wire inverters and the multilevel inverters. At present three phase inverters nd wide range of grid connected applications such as Front end converter (FEC) to drives and distributed generating systems, Active lter, Uninterrupted power supply (UPS)

Fig 1 . Grid interactive system[1]

III INVERTER TOPOLOGIES

There are several possible topologies to connect the DG units to the three phase distribution network. These topologies can be divided into three groups: the three phase three-wire inverters, the three-phase four-wire inverters and the multilevel inverters..

1. Three-phase three-wire inverter topology

   It consist of three leg comprising of two switches in each leg. dc link is provided with a capacitor called DC link capacitor. Due to the lack of a fourth wire, this topology is less interesting for a low-voltage distribution network which is typically a four-wire system. A fourth wire can be added by connecting the three wire inverter to an isolation transformer, which is heavy and costly and thus not desired in many applications. Using the three phase three-wire topology, only two parameters can be controlled, which is disadvantageous in case active power ltering functions are desired.

2. Three-phase four-wire inverter topologies

   The second group of inverters is the four-wire transformer less inverters which are usually more preferable. There are two common ways to provide the neutral connection: retaining a three-leg inverter but splitting the dc-bus with a pair of capacitors to provide the fourth wire or retaining a single dc-bus capacitor by providing a fourth leg (and thus an extra pair of switches).This is very attractive for applications where three-phase four-wire output is required. This topology is known to produce balanced output voltages even under unbalanced load conditions.

   1. Four-leg inverter

      A way of providing a neutral connection for three phase four-wire systems is using a four-leg inverter topology and tying the neutral point to the midpoint of the fourth neutral leg.

   2. Split link inverter

   A straight forward way to provide a neutral point is to use two capacitors in parallel with large balancing resistors with the neutral point clamped at half of the DC link voltage. Such a conguration is called a split DC link. This topology is widely adopted in active power lters because the neutral current in active power lters does not have a DC component and the fundamental component is relatively small

   The split-link topology is interesting due to its simple topology, usage of fewer semiconductors (compared to the four-leg inverter). Another advantage is that a three-phase split-link inverter essentially becomes three single-phase half-bridge inverters and permits each of the three legs to be controlled in- dependently, making its current tracking control simpler than the four-leg inverter.

   Disadvantages associated with split dc link: One of the disadvantages is ensuring equal voltage sharing between the split capacitors and the need to attenuate voltage ripple. This results in the need for large and expensive dc link capacitors or even extra balancing structures. The second disadvantage is that the large neutral current (due to either unbalanced or nonlinear loads) causes a perturbation in the slit voltages. Such a perturbation needs to be compensated for the control scheme and risks malfunction of the inverter.

   Another disadvantage is caused by the fact that the split- link topology requires that the phase-voltage peak is less than or equal to half the total dc-link voltage, whereas the four-leg inverter can follow a line-voltage peak equal to half the total dc-link voltage. This gives an approximately 15% advantage in dc voltage utilization in favor of the four-leg inverter. A split voltage controller is developed to obtain maximum dc voltage utilization

   On the basis of EMC performance, it would be attractive to choose the split-link three-leg inverter. To overcome the voltage balancing problem, it is possible to t an active balancing circuit to the split link using two additional semiconductor switches (the equivalent of a fourth leg) so that current can be injected into the split capacitors[3], and a control solution was provided[8]. The active control of the split link can also yield a reduced capacitor size over the passively balanced split link topology.

   Fig 2 . Actively balanced split link inverter[1]

   In this, the pair of capacitors is the key element. The split voltage sources are for analysis purposes only. In practice, a single power source would be present[7]. The DC bus capacitor is divided into two by providing a neutral point. The voltage through each DC capacitor is half of the dc link voltage.

   Depending on operating condition of the inverter, the neutral point voltage varies. It has been assumed that the neutral line is solidly connected to ground, but this connection could be replaced with grounding impedance. The parasitic capacitors between each bus bar and ground have been reduced to a single capacitance between the midpoint of the source and ground. It is clear that connecting the split point to neutral and indirectly to ground prevents the parasitic capacitors from being exposed to large voltage transitions. A shortcoming of the actively balanced split-link inverters that the number of semiconductor switches is equal to that of the four-leg inverter, but the dc voltage utilization is only that of the split-link three-leg inverter (in other words, the 15% advantage of the fourth leg is not achieved). However, this is on the assumption that the dc-link voltage is equally split and the osets of two bus bar voltages are xed [4].

   IV CONTROLLER DESIGN TO MITIGATE THE IMBALANCE IN DC LINK VOLTAGE

   DC bus imbalance in a split capacitor based rectier or inverter system is a widely studied issue. In this paper the DC bus imbalance problem has been studied for a three phase four wire grid connected inverter where the midpoint of the split capacitor is connected to the neutral of grid. Two algorithms were implemented to reduce the voltage imbalance

   1. Closed loop current control strategy b.Sensed output voltage control

      Let us assume that the 3 phase 4 wire inverter with LCL lter is being used as a DSTATCOM. The main control strategy with the DC bus imbalance correction is shown in Fig. 3 and Fig 4. Here in this paper controller design part for the imbalance correction is discussed. The objective here is to make the dc link voltage to the designed specified value. To do so we are controlling the gating pulses to the switches to get the exact voltage across the dc link capacitor

      Fig 3 . Closed loop control strategy

      Fig 4 . Sensed output voltage control

      In sensed output voltage control, both the the dc link voltage and the output voltage is sensed simultaneously. So the error obtained is more accurate compared to the former method. It contains only simple logic circuits. So it is seen tobe simple than the closed loop current control.

      V.MATLAB SIMULATIONS

      The actively balanced split link inverter utilizes a standard three-phase converter where DC link capacitor is splitted and the midpoint of the capacitor is connected to the fourth wire to provide the return path for the neutral current[21]

      Here the DC bus capacitor is divided into two by providing a neutral point[18]. The voltage through each DC capacitor is the half of the dc link voltage. Using nite voltage values to the two dc link capacitors, they can be charged or discharged by neutral current which causes deviation in neutral point voltage.

      The voltages across the two split capacitors are unbalanced in nature. It may vary the grid performance.

      Fig 6 . Voltage across the capacitors(With closed loop current controller)

      Fig 7 . Voltage across the capacitors(With sensed output voltage controller)

      Fig 8 . Load voltage profile(with sensed output voltage controller)

      Fig 4 . Load voltage profile(without any controller)

      Fig 5 . Voltage across the capacitors(Without any controller)

      CONCLUSION

      The grid interactive inverter topologies are widely studied here. From the overview of three-phase inverter topologies, it is seen that the most interesting topologies are the split dc-link and the four-leg inverter due to their simple topology[20]. These topologies provide a three-dimensional control which is interesting in active ltering applications. It is feasible to modulate the bus bar oset voltage of a split-link, three-leg, four-wire inverter using an active balancing circuit, and by doing so, the dc voltage utilization can be improved. No advantage in number of switches is achieved because the active balancer is the equivalent of a fourth leg[11], but a signicant advantage is found in the spectrum of the voltage across any parasitic capacitance between the dc link and ground. The PWM signals can be achieved by closed loop current control and the load voltage become controllable in accordance with the PWM signals.

      Since the sensed output voltage control detect both the output voltage and the dc link voltage, error is more useful to mitigate the problem of voltage unbalance. Compared to the closed loop control(which detect only the output current) , sensed output voltage control gives the better solution to the problem.

      REFERENCES

      1. Jun Liang, Tim C. Green, ChunmeiFeng, and George Weiss Increasing Voltage Utilization in Split-Link, Four-Wire Inverters IEEE transactions on power electronics, vol. 24, No. 6, june 2009

      2. Hailian Xie, Lennart ngquist and Hans-Peter Nee. Design Study of a Converter Interface Interconnecting Energy Storage With the DC Link of a StatCom IEEE transactions on power electronics, vol.26, No. 4, Oct 2011

      3. Kalpesh H. Bhalodi, and Pramod Agarwal. Space Vector Modulation with DC-Link Voltage Balancing Control for Three- Level Inverters ,International Journal of Recent Trends in Engineering, Vol 1, No. 3, May 2009.

      4. Moleykutty George and Kartik Prasad Basu. Modeling and Control of Three-Phase Shunt Active Power Filter, American Journal of Applied Sciences: 1064 1070 , 2008

      5. J. M. Carrasco, L. G. Franquelo, J. T. Bialasiewicz, E. Galvan, R.

3. P. Guisado, M. A. M. Prats, J. I. Leon, and N. Moreno- Alfonso, Power- electronic systems for the grid integration of renewable energy sources IEEE Trans. Ind. Electron., vol. 53, No. 4, pp: 1002 1016, Aug. 2006.

1. Z. Chen, J. M. Guerrero, and F. Blaabjerg, A review of the state of the art of power electronics for wind turbines IEEE Trans. Power Electron., vol. 24, No. 8, pp.1859 1875 , Aug. 2009.

2. R. Zhang, V. H. Prasad, D. Boroyevich, and F. C. Lee, Three dimensional space vector modulation for four-leg voltage-source converters IEEE Trans. Power Electron., vol. 17, No. 3, pp. 314

   326 , May2002.

3. F. Wang, Multilevel PWM VSIs: Coordinated control of regenerative three-level neutral point clamped pulse width modulated voltage source inverters , IEEE Industrial Applications Magazine, July-August 2004, pp. 51 58.

4. S. Ogasawara, and H Akagi, Analysis of variation of neutral point po-tential in neutral-point-lamped voltage source PWM Inverters , IEEE Industrial Applications Society Conference, 1993, pp.965 970 .

5. K. R. M. N. Ratnayake, Y. Murai and T. Watanabe, Novel PWM scheme to control neutral point voltage variation in three-level voltage source inverter IEEE Industrial Applications, 34th IAS Annual Meeting Conference, vol. 3, pp. 1950 1955 , 1999.

6. R. Rojas, T. Ohnishi and T. Suzuki, An improved voltage vector control method for neutral point clamped inverters IEEE Transactions on Power Electronics, vol. 10, No. 6, pp. 666 672 , November 1995.

7. B. Wu, High-Power Converters and AC Drives , IEEE Press and Wiley, pp. 143 176, 2006.

8. C. Newton, and M. Summer, Neutral point control for multi- level in-verters: Theory, design and operation limitations IEEE IAS Conference Reccordings, 1997, pp.1336 1343 .

9. K. Yamanaka, A. M. Hava, H. Kirino, Y. Tanaka, N. Koga, and T. J.Kume, A novel neutral potential stabilization technique using the information of output current polarities and voltage vector IEEE Transactions. On Industrial. Applications, vol. 38, No. 6, pp.1572 1580 , November/December 2002.

10. C. A. Quinn, N. Mohan, and H. Mehta, A four-wire, current- controlled converter provides harmonic neutralization in three- phase, four-wire systems IEEE Appl. Power Electron. Conf. Expo. Mar. 711, 1993, pp. 841 846.

11. S.M.AliandM. P.Kazmierkowski, Current regulation of four-leg PWMVSI IEEE 24th Annu.Ind. Electron. Conf. (IECON 1998), Aug.31Sep. 4., vol. 3, pp. 1853 1858.

12. K. Mainali, R. Oruganti, K. Viswanathan, and S. P. Ng, A metric for evaluating the EMI spectra of power converters IEEE Trans. Power Electron., vol. 23, No. 4, pp.2075 2081, Jul. 2008.

13. K. L. Zhou, D. W. Wang, and K. S. Low, Periodic errors elimination in CVCF PWM DC/AC converter systems: Repetitive control approach Inst. Electr. Eng. Proc. Control Theory Appl., vol. 147, No. 6, pp. 694 700, 2000.

14. X. H. Wu, S. K. Panda, and J. X. Xu, DC link voltage and supply- side current harmonics minimization of three phase PWM boost rectiers using frequency domain based repetitive current controllers IEEE Trans.Power Electron., vol. 23, No. 4, pp. 1987

    1997, Jul. 2008.

15. H. W. Van Der Broeck, H. C. Skudelny, and G. V. Stanke, Analysis and realization of a pulse modulator based on voltage space vectors IEEETrans. Ind. Appl., vol. 24, No. 1, pp. 142 150, Jan./Feb., 1988

16. J. A. Houldsworth and D. A. Grant, The use of harmonic distortion to increase the output voltage of a three-phase PWM inverter IEEE Trans.Ind. Appl., vol. IA-20, No. 5, pp. 1224 1228, Sep./Oct. 1984.