Performance Analysis of Three Phase Induction Motor Drive using SVPWM Switching Techniques: Design Approach

Performance Analysis of Three Phase Induction Motor Drive using SVPWM Switching Techniques: Design Approach

Manish K Botkewar Dept. of Electrical Engineering Suresh Deshmukh College of

Engineering,Wardha, India,

Mahadev Gaidhane

Dept. of Electrical Engineering, Priyadarshini College of Engineering,Nagpur, India,

K Sawalakhe

Dept. of Electrical Engineering Suresh Deshmukh College of Engineering,Wardha, India,

Abstract Space vector pulse width modulation (SVPWM) technique has emerged as a most used modulation strategy for the voltage source inverter (VSI) fed AC motor drives. Avoidance of the main spectral annoyance, harmonics concentration around the carrier frequency and it multiples, is done by increasing the switching frequency to a band which does not contribute mechanical vibrations and acoustic noises. This results in tremendous increase the switching losses. A systematic evaluation of SVPWM switching patterns can guide proper selection of switching frequency and vectors. A Matlab based comparative analysis of all these SVPWM variants in terms of attributes such as total harmonic distortion (THD) in output line voltage, DC bus utilization and the harmonic spread factor (HSF) is reported. For this using space vector pulse width modulation method a multilevel inverter above two level inverter can be designed. This simplification reduced considerably the computation time. A two level space vector pulse width modulation method also used for three as well as five level inverter.

Keywords VANET (vehicular network)component; electronic Route Guidance system (ERGS), Comprehensive Automobile Traffic Control System (CACS), PROMETHEUS (Program for European Traffic with Highest Efficiency and Unprecedented Safety).

1. INTRODUCTION

   Three phase dc/ac voltage source inverter (VSI) is used extensively in AC motor drives, active filters, and unified power flow controllers in power systems, and uninterrupted power supplies to generate controllable frequency and ac voltage magnitudes using various pulse width modulation (PWM) strategies. The PWM strategy plays an important role in the minimization harmonics and improving the fundamental in these inverters, especially in the three phase applications. Space vector pulse width modulation (SVPWM) technique has emerged as a most used modulation strategy for the voltage source inverter (VSI) fed AC motor drives. SVPWM is a method of pre-calculation of switching timing instants for various sections of target output which has options in terms of positioning vectors inside every sampling interval and has six possible patterns (variants) of the voltage vectors arrangements in each sector. SVPWM switching patterns, depending on the switching frequency, causes the mechanical vibration and the annoying acoustic noise to the drive system. Avoidance of the main spectral annoyance, harmonics concentration around the carrier frequency and it multiples, is done by increasing the switching frequency to a band which does not contribute mechanical vibrations and acoustic noises.

   This results in tremendous increase the switching losses. A systematic evaluation of SVPWM switching patterns can guide proper selection of switching frequency and vectors. A MATLAB based comparative analysis of all these SVPWM variants in terms of attributes such as total harmonic distortion (THD) in output line voltage, DC bus utilization and the harmonic spread factor (HSF) is studied.

2. LITERATURE SURVEY

   In this paper the comprehensive analytical analysis and comparison of switching ripple characteristics of two continuous space vector PWM (SVPWM) methods for a five- phase two-level VSI .is presented. This paper also presents the evaluation of the flux harmonic distortion factors of the SVPWM techniques. Correlation with corresponding current ripple and total harmonic distortion is established in this paper, where theoretical considerations are verified by simulations and through experimental investigation on a five- phase VSI-fed induction motor drive. In particular, determination of the flux HDFs has been considered. It is shown that, although SVPWM (4L) is characterized with a smaller flux HDF in the second plane, it simultaneously has a considerably higher flux HDF in the first plane. As a result, the total flux HDF of the SVPWM (4L) is considerably higher than the one of the SVPWM (2L+2M) for all modulation indices above approximately 0.2.The behavior of the total flux HDF is directly reflected in the behavior of the current ripple only if the inductance relevant for the current ripple is the same in the two planes of the five phase system, as shown by simulations [1].

   In this paper, a switching pattern based on the concept of the conventional space vector Pulse Width Modulated (SVPWM) technique is developed for single-stage, three- phase boost-inverters using the topology of current-source inverters. The six main switching states, and two zeros, with three switches conducting at any given instant in conventional SVPWM techniques are modified herein into three-charging states and six discharging states with only two switches conducting at any given instant. The charging states are necessary in order to boost the dc input voltage. The developed switching pattern was experimentally verified through a laboratory-scaled three phase 500-W boost inverter and the results are presented in this paper [2].

   This paper presents a study of mixed-mode chip for use in a vector-controlled induction motor drive. It exhibits digital

   scalar space vector pulse width modulation (DSSVPWM), and comprises a proportional-integral (PI) controller, a simplified central processing unit (CPU), and a second-order delta-sigma analog-to-digital converter (- ADC). It is fabricated using a standard 0.35-m 2P4M CMOS process. All of the circuits, digital and analog, are realized in a single chip as a convenient, high-speed, highly integrated, and low-cost solution. The digital circuit contains a DSSVPWM, a simplified CPU, a PI controller, and a decimator filter; the analog circuit is a second-order switched-current (SI) delta- sigma modulator, which includes two discrete-time integrators, a current comparator, a current-mode digital-to- analog converter, a D-type flip-flop, a nonoverlapping clock generator, and a bias current generator. This mixed-mode chip constitutes a closed-loop motor drive system with stable performance, short response times, precise controllability, and flexibility. Experimental results indicate that the digital circuit has a power consumption of 17.95 mW and a maximum frequency of 100 MHz, and that the SNR and power dissipation of the analog circuit are 71.9 dB and 12.1 mW, respectively, with a bandwidth of 10 kHz, an over sampling ratio of 128, and a sampling rate of 2.56 MHz at a power supply of 3.3 V [3].

   In this paper a shifted space vector pulsewidth modulation (PWM) (SVPWM) method to control dc-link resonant inverters is presented. The shifted SVPWM has the same effective vectors and operation time as the traditional SVPWM in all six space sectors, while the sequences of vectors changed according to the load current flow direction. All the switches of a three-phase inverter can be turned on under the zero-voltage switching condition, and only one auxiliary resonance during one PWM switch period of the inverter is required. The aims of the method are to increase the switching frequency of the inverter, reduce the switching frequency of the dc-link resonant circuit, and improve the utility of the dc-link voltage. A set of design rules to generate the shifted SVPWM, as well as its hardware implementation is described in detail. The synchronization circuit is also discussed. To decrease the time burden of the digital signal processor, a field-programmable gate array is employed to receive the effective vectors and the corresponding time and generates the shifted SVPWM drive signals. The simulation and experimental results have verified the feasibility of the shifted SVPWM approach [4].

   Neutral-point (NP)-clamped three-level inverter, which is a widely used topology of multilevel converters, suffers from the NP voltage drift as its main technical drawback. The Nearest-Three-Virtual-Vector (NTV2) modulation method can control the NP voltage balance for any load over the full range of inverter output voltage. However, compared with the nearest three-vector (NTV) modulation method, NTV2 increases the switching frequency. This paper combines NTV2 with NTV, and the two methods are used alternately in a fundamental cycle. The duty-cycle coefficients of the redundant small vectors are analyzed to explore the intervals where NTV can control the NP voltage balance in a fundamental cycle. The proportional parameter, which represents the combination of the two methods in hybrid space vector pulse width modulation, can be selected to achieve a high-performance NP balance control and low switching frequency. The steady- and transient-state behaviors of the

   proposed strategy are analyzed in this paper. The experimental results verify the validity of the proposed strategy [5].

   This paper presents a space vector pulse width modulation algorithm for five-phase converters operating in the over modulation region that forbids the use of zero vectors, covering the whole over modulation range and providing minimum xy voltages. Avoiding zero vectors reduces the content of low-order current harmonics and, at the same time, reduces the common-mode voltage (CMV) by 40%. The method is first implemented using medium and large voltage space vectors, showing good performance in terms of current harmonic content. Then, the algorithm is applied to the case when four large vectors are used; further reducing the peak-to- peak CMV by 80% and still demonstrating a satisfactory performance. Both methods are experimentally compared to existing over modulation algorithms obtaining better current quality and lower peak-to-peak CMV [6].

   The five-level active neutral-point-clamped (5LANPC) converter has been widely studied for its excellent performance in high-power medium-voltage applications. This paper analyzes the space vector pulse width modulation (SVPWM) strategy of the 5L-ANPC converter in the virtual coordinate, and presents an optimized control strategy which can balance the neutral point (NP) voltage and avoid the dead- time effects for the first time. In this strategy, on one hand, the 125 space vectors are combined by 96 triangles in the seven- segment vector synthesis method, then the triangles are divided into seven categories which have different characteristics of balancing the NP voltage, and every category has its own principles to choose the vector sequence and compute the vector durations. On the other hand, the dead time effects of the 5L-ANPC converter are studied in detail and the transitions between different switching states are constrained in the optimized control strategy to avoid the dead-time effects that cannot be compensated by traditional pulse-based dead-time compensation methods [7].

   The sideband current harmonic components would inhere in permanent-magnet (PM) synchronous machine systems driven by a voltage-source inverter with space vector pulse width modulation (SVPWM). However, these harmonics could potentially deteriorate the overall performance of the drive system by increasing the resultant losses, torque ripple, and electromagnetic and acoustic noises. The main sideband harmonic voltages and currents in PM synchronous machine driven by voltage-source inverter with SVPWM technique, are analytically derived and expressed in both stator and rotor frame. The experimental results are carried out to underpin the validity of the analytical model. The analytical model could be employed to assess the influencing factors of current harmonics. In addition, it offers insightful guidance to the effective reductions of harmonic losses, torque ripples, and electromagnetic noises [8].

   In this paper a space vector pulse-width modulation (SVPWM) strategy of the post-fault reconfigured dual inverter in open-end winding motor drive systems is discussed. The reconfigured dual H-bridge inverter can produce the same distribution of space voltage vectors with the conventional two-level inverters, but different switches are used to obtain these voltage vectors. A new seven-segment SVPWM strategy suppressing the dead time effect of insulated gate bipolar

   transistors in the same leg is presented, and its algorithm and implementation are discussed [9].

   The Space Vector Modulation technique is an important PWM generation technique for three phase voltage source inverter in order to generate PWM signals for controlling various AC Motors. In such applications generation of PWM signal, dead time and other computational task requires high sampling rate for wide bandwidth performance. This work focuses on the design of low power and high performance VHDL based SVPWM controller for three phase Induction Motor drive on FPGA. The integer realization of software part results in large number of subroutines thus utilizing large hardware resources on FPGA board leading to more power consumption. Also due to large code density the computational time is more. In this work the software part is implemented with proposed fixed point realization which increases the accuracy, also since there are no subroutines it reduces total area on FPGA board. The code density is less, thereby decreasing computational time and power consumption. The simulation results for SVPWM generated signal are presented in this work. To prove the effectiveness of the proposed method the hardware utilizations by the proposed method are compared with integer realization [10].

3. METHODOLOGY

   Space vector pulse width modulation (SVPWM) technique has emerged as a most used modulation strategy for the voltage source inverter (VSI) fed AC motor drives. SVPWM is a method of pre-calculation of switching timing instants for various sections of target output which has options in terms of positioning vectors inside every sampling interval and has six possible patterns (variants) of the voltage vectors arrangements in each sector? SVPWM switching patterns, depending on the switching frequency, causes the mechanical vibration and the annoying acoustic noise to the drive system. Avoidance of the main spectral annoyance, harmonics concentration around the carrier Avoidance of the main spectral annoyance, harmonics concentration around the carrier frequency and it multiples, is done by increasing the switching frequency to a band which does not contribute mechanical vibrations and acoustic noises. This results in tremendous increase the switching losses. A systematic evaluation of SVPWM switching patterns can guide proper selection of switching frequency and vectors. A Matlab based comparative analysis of all these SVPWM variants in terms of attributes such as total harmonic distortion (THD) in output line voltage, DC bus utilization and the harmonic spread factor (HSF) is studied.

4. SIMULATION AND EXPERIMENTAL RESULT

   Fig. 1. SVPWM based speed control of induction motor.

   The proposed system steps to be carried out are following:

   • Implementing basic circuit diagram of three level inverter using various switching devices, dc source as input, and clamping diode.

   • Design of control scheme (SVPWM) for three level inverter.

   • Analysis of SVPWM Technique on Performance analysis of three phase induction motor and study of results and possible modifications.

   In this method we have used three single phase source along with universal bridge which acts as recifier to convert AC signal into DC signal. This DC signal is then applied to Three Level Bridge Inverter which converts this signal into AC signal using SVPWM and provides it to Asynchronous Machine.

   As this model design is a Closed Loop SVPWM Model. The pulses to the Three Level Bridge Inverter is provided by the SVPWM circuit whose input is taken from the RPM of Asynchronous Machine which acts as a feedback.

   The SVPWM model consists of Discrete PI Controllers, Embedded MATLAB Functions along with Divider, Subtractor, Gain and Saturation blocks. All these blocks help us to create pulses for Three Level Bridge Converter.

   Fig. 2. Rotor current and electromagnetic torque.

   As it is a Closed Loop SVPWM Model. So in the above waveform we can observe the rotor speed (RPM) of the Asynchronous Machine along with the Electromagnetic Torque shown below. In both the waveforms we are able to see spikes because according to the specification of the load which is Asynchronous Machine which acts as motor in our case. The rotor speed (RPM) increases and decreases due to the Discrete PI Controller operation, due to which we are able to observe change in Electro Magnetic Torque.

5. CONCLUSION

The Matlab based comparative analysis of SVPWM variants in terms of attributes such as total harmonic distortion (THD) in output line voltage, DC bus utilization and the harmonic spread factor (HSF). To realize such analysis of these attributes using space vector pulse width modulation method a multilevel inverter above two level inverter will be designed.

This will simplify and reduce the computation time considerably. A two level space vector pulse width modulation method may also be used for three as well as five level inverter.

REFERENCES

1. Drazen Dujic, Martin Jones, Emil Levi, Joel Prieto , and Federico Barrero Switching Ripple Characteristics of Space Vector PWM schemes for Five-Phase Two-Level Voltage Source InvertersPart 1: Flux Harmonic Distortion Factors IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO. 7, pp. 2789-2798, JULY 2011.

2. Behrooz Mirafzal, Mahdi Saghaleini, and Ali Kashefi Kaviani An SVPWM-Based Switching Pattern for Stand-Alone and Grid- Connected Three-Phase Single-Stage Boost Inverters IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 4,pp. 1102-1111, APRIL 2011.

3. Guo-Ming Sung, Chih-Ping Yu, Tsai-Wang Hung, and Hsiang-Yuan Hsieh Mixed-Mode Chip Implementation of Digital Space SVPWM With Simplified-CPU and 12-Bit 2.56 Ms/s Switched-Current Delta- Sigma ADC in Motor Drive IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 27, NO. 2, pp. 916-930, FEBRUARY 2012.

4. Sanbo Pan, Junmin Pan, and Zuohua Tian A Shifted SVPWM Method to Control DC-Link Resonant Inverters and Its FPGA Realization IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 59, NO. 9, pp. 3383-3391, SEPTEMBER 2012

5. Changliang Xia, Hongjun Shao, Yun Zhang, and Xiangning He Adjustable Proportional Hybrid SVPWM Strategy for Neutral-Point- Clamped Three-Level Inverters IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 60, NO. 10, pp. 4234-4242 OCTOBER 2013.

6. Mario J. Durán, Joel Prieto, Federico Barrero, José A. Riveros, and Hugo Guzman Space-Vector PWM With Reduced Common- ModeVoltage for Five-Phase Induction Motor Drives IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 60, NO. 10, pp. 4159-4168 OCTOBER 2013.

7. Guojun Tan, Qingwei Deng, and Zhan Liu An Optimized SVPWM Strategy for Five-LevelActive NPC (5L-ANPC) Converter IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 1, pp. 386-395, JANUARY 2014.

8. Wenyi Liang, Jianfeng Wang, Patrick Chi-Kwong Luk, Weizhong Fang, and Weizhong Fei Analytical Modeling of Current Harmonic Components in PMSM Drive With Voltage-SourceInverter by SVPWM Technique IEEE TRANSACTIONS ON ENERGY CONVERSION, VOL. 29, NO. 3, pp. 673-680, SEPTEMBER 2014.

9. Qun-tao An, M.H. Duan, L. Sun and G.L. Wang SVPWM strategy of post-fault reconfigured dual inverter in open-end winding motor drive systems ELECTRONICS LETTERS 14th August 2014 Vol. 50 No. 17 pp. 12381240.

10. Chaurasiya Rohit B.,Mukesh D.Patil,Divya Shah,Abhijit Kadam FPGA Implementation of SVPWM Control Technique for Three Phase Induction Motor Drive Using Fixed Point Realization Proceeding Of IEEE International Conference on Circuits, Systems, Communication and Information Technology Applications (CSCITA), pp.651-656,2012.